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path: root/arch/x86/cpu
AgeCommit message (Expand)AuthorFilesLines
2019-12-15x86: apl: Add ITSS driverSimon Glass2-0/+215
2019-12-15x86: apl: Add hostbridge driverSimon Glass2-0/+180
2019-12-15x86: apl: Add systemagent driverSimon Glass2-0/+25
2019-12-15x86: apl: Add UART driverSimon Glass2-0/+134
2019-12-15x86: apl: Add PMC driverSimon Glass2-0/+221
2019-12-15x86: Move qemu CPU fixup function into its own fileSimon Glass3-68/+79
2019-12-15x86: Add low-power subsystem (lpss) supportSimon Glass2-0/+45
2019-12-15x86: Add support for newer CAR schemesSimon Glass3-0/+543
2019-12-15x86: Allow interrupt to happen onceSimon Glass2-9/+1
2019-12-15x86: Update mrccache to support multiple cachesSimon Glass3-9/+15
2019-12-15x86: Define the SPL image startSimon Glass1-1/+4
2019-12-15x86: Move UCLASS_IRQ into a separate fileSimon Glass1-5/+0
2019-12-15x86: Drop unnecessary interrupt code for TPLSimon Glass1-0/+2
2019-12-15x86: Drop unnecessary cpu code for TPLSimon Glass2-4/+41
2019-12-15x86: timer: use a timer base of 0Simon Glass2-0/+2
2019-12-15x86: spi: Add helper functions for Intel Fast SPISimon Glass2-0/+74
2019-12-08x86: simplify ljmp to 32-bit codeMasahiro Yamada1-3/+1
2019-12-08x86: use data32 directive instead of macro for operand-size prefixMasahiro Yamada1-5/+3
2019-12-03common: Move board_get_usable_ram_top() out of common.hSimon Glass9-0/+9
2019-12-03common: Move interrupt functions into a new headerSimon Glass2-0/+2
2019-12-03common: Move ARM cache operations out of common.hSimon Glass1-0/+1
2019-12-03common: Move some cache and MMU functions out of common.hSimon Glass3-0/+3
2019-12-03common: Move checkcpu() out of common.hSimon Glass10-0/+10
2019-11-03x86: Move CPU init to before spl_init()Simon Glass1-0/+1
2019-11-03x86: Add a CPU init function for TPLSimon Glass1-0/+8
2019-10-11x86: Reduce resetvec sizeSimon Glass1-3/+0
2019-10-11x86: Drop RESET_SEG_SIZESimon Glass1-1/+0
2019-10-11x86: Drop RESET_BASESimon Glass1-1/+0
2019-10-08x86: cpu: Don't include the cpu driver in TPLSimon Glass1-1/+4
2019-10-08x86: Add a function to set variable MTRRsSimon Glass1-0/+38
2019-10-08x86: Refactor mtrr_commit() to allow for shared codeSimon Glass1-7/+12
2019-10-08x86: Add new common CPU functions for turbo/burst modeSimon Glass1-0/+61
2019-10-08x86: Tidy up some duplicate MSR definesSimon Glass3-11/+11
2019-10-08x86: Add common functions for TDP and perf controlSimon Glass5-32/+33
2019-10-08x86: Use a common bus clock for Intel CPUsSimon Glass3-5/+5
2019-10-08x86: Add a common function to set CPU thermal targetSimon Glass3-41/+26
2019-10-08x86: Use a common definition of MSR_IA32_PERF_CTLSimon Glass3-3/+3
2019-10-08x86: pci: Drop the first parameter in pci_x86_r/w_config()Simon Glass3-19/+11
2019-10-08x86: Move acpi_s3.h to a common locationSimon Glass3-3/+3
2019-10-08x86: Rename turbo ratio MSR to MSR_TURBO_RATIO_LIMITSimon Glass1-1/+1
2019-10-08x86: Add more comments to the start-up codeSimon Glass3-3/+17
2019-10-08x86: Change condition for using CARSimon Glass1-2/+2
2019-10-08x86: fsp: Save usable RAM and hob_list in the handoff areaSimon Glass1-0/+6
2019-10-08x86: spl: Move broadwell-specific code out of generic x86 splSimon Glass2-0/+12
2019-10-08x86: pci: Add a function to clear and set PCI config regsSimon Glass1-0/+19
2019-10-08x86: Add binman symbols to the imageSimon Glass1-0/+6
2019-10-08x86: Move common Intel CPU info code into a functionSimon Glass3-14/+16
2019-10-08x86: Rename some FSP functions to have an fsp_ prefixSimon Glass4-4/+4
2019-10-08x86: Rename existing FSP code to fsp1Simon Glass6-6/+6
2019-09-10x86: tangier: Fix off-by-one error when preparing CSRTAndy Shevchenko1-1/+1
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