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2023-02-10Correct SPL uses of LMBSimon Glass1-1/+1
This converts 9 usages of this option to the non-SPL form, since there is no SPL_LMB defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10Correct SPL uses of BOOTSTAGE_REPORTSimon Glass1-1/+1
This converts 2 usages of this option to the non-SPL form, since there is no SPL_BOOTSTAGE_REPORT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10x86: Correct Chrromebook typoSimon Glass1-1/+1
Fix a typo in a comment. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18x86: Fix saying arch_cpu_init_dm in debug/docsTom Rini1-1/+1
The function arch_cpu_init_dm was renamed to fsp_setup_pinctrl in these cases, so rename debug / docs to match. Cc: Simon Glass <sjg@chromium.org> Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-09x86: fsp: Only compile fsp_save_s3_stack if (SPL_)DM_RTC is enabledSean Anderson1-0/+2
This function calls rtc_write32, which has a different signature depending on if (SPL_)DM_RTC is enabled or not. This could result in a mismatch in SPL if DM_RTC was enabled but SPL_DM_RTC, as the non-DM declaration would still be used in SPL even though the implementation would be for non-DM_RTC. We are switching to the correct definitions in the next commit, so this will become a compilation error. Since fsp_save_s3_stack is not called from SPL, avoid compiling it if (SPL_)DM_RTC is disabled. Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-12-06global: Move remaining CONFIG_SYS_* to CFG_SYS_*Tom Rini1-1/+1
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-31Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASESimon Glass2-6/+6
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-18dm: treewide: Use uclass_first_device_err when accessing one deviceMichal Suchanek1-3/+1
There is a number of users that use uclass_first_device to access the first and (assumed) only device in uclass. Some check the return value of uclass_first_device and also that a device was returned which is exactly what uclass_first_device_err does. Some are not checking that a device was returned and can potentially crash if no device exists in the uclass. Finally there is one that returns NULL on error either way. Convert all of these to use uclass_first_device_err instead, the return value will be removed from uclass_first_device in a later patch. Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-29treewide: Drop image_header_t typedefSimon Glass1-1/+1
This is not needed and we should avoid typedefs. Use the struct instead and rename it to indicate that it really is a legacy struct. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29treewide: Drop bootm_headers_t typedefSimon Glass1-3/+3
This is not needed and we should avoid typedefs. Use the struct instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-23board_f: Fix types for board_get_usable_ram_top()Pali Rohár2-2/+2
Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-12video: Rename structs and functions to avoid VBESimon Glass2-6/+6
Rename these to VESA, itself an abbreviation, to avoid a conflict with Verified Boot for Embedded. Rename this to avoid referencing VBE. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12video: Renname vbe.h to vesa.hSimon Glass3-3/+3
We want to use VBE to mean Verfiied Boot for Embedded in U-Boot. Rename the existing VBE (Vesa BIOS extensions) to allow this. Verified Boot for Embedded is documented doc/develop/vbe.rst Signed-off-by: Simon Glass <sjg@chromium.org>
2022-07-26zynqmp: Run board_get_usable_ram_top() only on main U-BootAshok Reddy Soma1-3/+2
With commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location"), the function board_get_usable_ram_top() is allocating MMU_SECTION_SIZE of about 2MB using lmb_alloc(). But we dont have this much memory in case of mini U-Boot. Keep these functions which use lmb under CONFIG_LMB so that they are compiled and used only when LMB is enabled. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/75e52def75f573e554a6b177a78504c128cb0c4a.1657183534.git.michal.simek@amd.com
2022-06-23linker_lists: Rename sections to remove . prefixAndrew Scull2-4/+4
Rename the sections used to implement linker lists so they begin with '__u_boot_list' rather than '.u_boot_list'. The double underscore at the start is still distinct from the single underscore used by the symbol names. Having a '.' in the section names conflicts with clang's ASAN instrumentation which tries to add redzones between the linker list elements, causing expected accesses to fail. However, clang doesn't try to add redzones to user sections, which are names with all alphanumeric and underscore characters. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-04Merge branch 'next'Tom Rini3-13/+6
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-31Revert "x86: Move FACP table into separate functions"Andy Shevchenko1-0/+15
Before the culprit patch (see BugLink for the details): => acpi list Name Base Size Detail ---- -------- ----- ------ RSDP 000e4500 24 v02 U-BOOT RSDT 000e4530 38 v01 U-BOOT U-BOOTBL 20220401 INTL 0 XSDT 000e45e0 4c v01 U-BOOT U-BOOTBL 20220401 INTL 0 CSRT 000e5490 58 v00 U-BOOT U-BOOTBL 20220401 INTL 0 FACP 000e54f0 114 v06 U-BOOT U-BOOTBL 20220401 INTL 0 DSDT 000e4780 c06 v02 U-BOOT U-BOOTBL 10000 INTL 20200925 FACS 000e4740 40 MCFG 000e5610 3c v01 U-BOOT U-BOOTBL 20220401 INTL 0 SPCR 000e5650 50 v02 U-BOOT U-BOOTBL 20220401 INTL 0 APIC 000e56a0 48 v02 U-BOOT U-BOOTBL 20220401 INTL 0 After the culprit patch: => acpi list Name Base Size Detail ---- -------- ----- ------ RSDP 000e4500 24 v02 U-BOOT RSDT 000e4530 34 v01 U-BOOT U-BOOTBL 20220401 INTL 0 XSDT 000e45e0 44 v01 U-BOOT U-BOOTBL 20220401 INTL 0 CSRT 000e53a0 58 v00 U-BOOT U-BOOTBL 20220401 INTL 0 MCFG 000e5520 3c v01 U-BOOT U-BOOTBL 20220401 INTL 0 SPCR 000e5560 50 v02 U-BOOT U-BOOTBL 20220401 INTL 0 APIC 000e55b0 48 v02 U-BOOT U-BOOTBL 20220401 INTL 0 As a result Linux kernel can't find mandatory tables and fails to boot. Hence, revert it for good. This reverts commit 379d3c1fd6aa490b1ad5697525cfc89b615cf25a. BugLink: https://lore.kernel.org/all/20220131225930.GJ7515@bill-the-cat/ Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-03-10event: Convert arch_cpu_init_dm() to use eventsSimon Glass3-13/+6
Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-09acpi: Move MCFG implementation to common libMoritz Fischer1-54/+0
MCFG tables are used on multiple arches. Move to common ACPI lib. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Moritz Fischer <moritzf@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> Use sizeof(*mcfg) instead of sizeof(*header) Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-09arch: x86: lib: acpi_table: Fix MCFG entriesMoritz Fischer1-0/+2
Commit d953137526cc ("x86: Move SSDT table to a writer function") introduced a bug where the actual MCFG entries are no longer generated. Cc: Simon Glass <sjg@chromium.org> Fixes: d953137526cc ("x86: Move SSDT table to a writer function") Signed-off-by: Moritz Fischer <moritzf@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move acpi_get_rsdp_addr() ACPI tables to the writerSimon Glass1-21/+0
Move this over to use a writer file, moving the code from the x86 implementation. There is no need to store a separate variable since we can simply access the ACPI context. With this, the original monolithic x86 function for writing ACPI tables is gone. Note that QEMU has its own implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move device-specific ACPI tables to a writer functionSimon Glass1-2/+0
Move this over to use a writer function, moving the code from the x86 implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move CSRT table to a writer functionSimon Glass1-49/+13
Move this table over to use a writer function, moving the code from the x86 implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move TCPA table to a writer functionSimon Glass1-22/+16
Move this table over to use a writer function, for x86 only. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move MADT table to a writer functionSimon Glass1-11/+14
Move this table over to use a writer function, for x86 only. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move TPM2 table to a writer functionSimon Glass1-21/+18
Move this table over to use a writer function, for x86 only. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move SSDT table to a writer functionSimon Glass1-63/+30
Move this table over to use a writer function, moving the code from the x86 implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move FACP table into separate functionsSimon Glass1-15/+0
Each board has its own way of creating this table. Rather than calling the acpi_create_fadt() function for each one from a common acpi_write_fadt() function, just move the writer into the board-specific code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-01-25x86: Move FADT table to a writer functionSimon Glass1-7/+15
Move this table over to use a writer function, for x86 only. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move GNVS table to a writer functionSimon Glass1-37/+36
Move this table over to use a writer function, for x86 only. Handle the two cases Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move DSDT table to a writer functionSimon Glass1-42/+7
Move this table over to use a writer function, moving the code from the x86 implementation. Add a pointer to the DSDT in struct acpi_ctx so we can reference it later. Disable this table for sandbox since we don't actually compile real ASL code. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move FACS table to a writer functionSimon Glass1-24/+2
Move this table over to use a writer function, moving the code from the x86 implementation. Add a pointer to the DSDT in struct acpi_ctx so we can reference it later. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move base tables to a writer functionSimon Glass1-2/+0
Use the new ACPI writer to write the base tables at the start of the area, moving this code from the x86 implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Use the ACPI table writerSimon Glass1-17/+4
Use the new ACPI writer to write the ACPI tables. At present this is all done in one monolithic function. Future work will split this out. Unfortunately the QFW write_acpi_tables() function conflicts with the 'writer' version, so disable that for sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: acpi: Split out context creation from base tablesSimon Glass1-3/+3
At present acpi_setup_base_tables() both sets up the ACPI context and writes out the base tables. We want to use an ACPI writer to write the base tables, so split this function into two, with acpi_setup_ctx() doing the context set, and acpi_setup_base_tables() just doing the base tables. Disable the writer's write_acpi_tables() function for now, to avoid build errors. It is enabled in a following patch. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25acpi: Use finer-grained control of ACPI-table generationSimon Glass1-1/+1
Rather than keying everything off ACPIGEN, use the main GENERATE_ACPI_TABLE option to determine whether the core ACPI code is included. Make sure these option are not enabled in SPL/TPL since we never generate tables there. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-19doc: replace @return by Return:Heinrich Schuchardt2-6/+6
Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15x86: efi: Round out the link script for 64-bit EFISimon Glass1-1/+4
Make sure the linker lists are in the right place and drop the eh_frame section, which is not needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-15x86: efi: Tweak the code used for the 64-bit EFI appSimon Glass2-3/+4
Add an empty CPU init function to avoid fiddling with low-level CPU features in the app. Set up the C runtime correctly for 64-bit use and avoid clearing BSS, since this is done by EFI when U-Boot is loaded. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-31x86: Don't process the kernel command line unless enabledSimon Glass1-5/+8
If the 'bootm' command is not enabled then this code is not available and this causes a link error. Fix it. Note that for the EFI app, there is no indication of missing code. It just hangs! Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-31x86: Allow booting a kernel from the EFI appSimon Glass1-4/+7
At present this is disabled, but it should work so long as the kernel does not need EFI services. Enable it and add a note about remaining work. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-21x86: Show some EFI info with the bdinfo commandSimon Glass2-0/+23
It is useful to see some basic EFI info with the command as it forms part of the information about a board. Add a hook for this and show the table address as a start. While here, fix an invalid cast in setup_efi_info(). Note that this function is using a data structure defined by Linux so we cannot change it. Also note that ulong is used since this is the standard in U-Boot (>6k uses), despite there being quite a bit of the more verbose uintptr_t (930 uses). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21x86: Create a new header for EFISimon Glass1-0/+1
The setup routines are called from zimage but don't really belong in the zimage header. Add a new EFI header to house these. Add comments so it is clear what the functions do. Note that these functions are x86-specific. The zimage business is not used on other architectures. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-30WS cleanup: remove SPACE(s) followed by TABWolfgang Denk1-2/+2
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-25treewide: Use OF_REAL instead of !OF_PLATDATASimon Glass1-1/+1
Now that we have a 'positive' Kconfig option, use this instead of the negative one, which is harder to understand. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25treewide: Simply conditions with the new OF_REALSimon Glass1-1/+1
Use this new Kconfig to simplify the compilation conditions where appropriate. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-23lmb: x86: Add arch_lmb_reserve()Marek Vasut1-0/+18
Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). It is rather likely this architecture also needs to cover U-Boot with LMB before booting Linux. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-09-17Remove #include <version.h> from files which do not need itPali Rohár1-1/+0
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-08-03Merge https://source.denx.de/u-boot/custodians/u-boot-x86Tom Rini3-20/+40
- Fixed broken ICH SPI driver in software sequencer mode - Added "m25p,fast-read" to SPI flash node for x86 boards - Drop ROM_NEEDS_BLOBS and BUILD_ROM for x86 ROM builds - Define a default TSC timer frequency for all x86 boards - x86 MTRR MSR programming codes bug fixes - x86 "hob" command bug fixes - Don't program MTRR for DRAM for FSP1 - Move INIT_PHASE_END_FIRMWARE to FSP2 - Use external graphics card by default on Intel Crown Bay - tangier: Fix DMA controller IRQ polarity in CSRT
2021-08-02global: Convert simple_strtoul() with hex to hextoul()Simon Glass1-7/+7
It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-31 12:22:03 +0300