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2023-08-01x86: Add a little more info to cbsysinfoSimon Glass1-0/+4
Show the number of records in the table and the total table size in bytes. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-08-01x86: fsp: Use mtrr_set_next_var() for graphics memoryBin Meng1-2/+1
At present this uses mtrr_add_request() & mtrr_commit() combination to program the MTRR for graphics memory. This usage has two major issues as below: - mtrr_commit() will re-initialize all MTRR registers from index 0, using the settings previously added by mtrr_add_request() and saved in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary - The way such combination works is based on the assumption that U-Boot has full control with MTRR programming (e.g.: U-Boot without any blob that does all low-level initialization on its own, or using FSP2 which does not touch MTRR), but this is not the case with FSP. FSP programs some MTRRs during its execution but U-Boot does not have the settings saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will corrupt what was already programmed previously. Correct this to use mtrr_set_next_var() instead. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-01x86: Change testing logic of mtrr commitBin Meng1-4/+2
On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper needs to program MTRRs too. With current testing logic of mtrr commit in init_cache_f_r(), the mtrr commit is skipped which won't work as the queued mtrr requests include setup for DRAM regions. Change the logic to allow such configuration. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tweak to put back CONFIG_FSP_VERSION2 at top: Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-17x86: Make sure that the LPC is active before SDRAM initSimon Glass1-0/+9
Some boards need to access GPIOs to determine which SDRAM is fitted to the board, for example chromebook_link. Probe this device (if it exists) to make sure that this works as expected. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Convert some debug statements to use loggingSimon Glass2-10/+18
Move from using debug() to log_debug() so that we don't have to use the __func__ parameter and can access other logging features. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Record the start and end of the tablesSimon Glass2-1/+23
The ACPI tables are special in that they are passed to EFI as a separate piece, independent of other tables. Also they can be spread over two areas of memory, e.g. with QEMU we end up with tables kept in high memory as well. Add new global_data fields to hold this information and update the bdinfo command to show the table areas. Move the rom_table_end variable into the loop that uses it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Refactor table-writing code a littleSimon Glass1-14/+14
The implementation of write_tables() is confusing because it uses the rom_table_start variable as the address pointer as it progresses. Rename it to rom_addr to make the code clearer. Move the rom_table_end variable into the block where it is used. Also update logging to use the ACPI category, now that it is available. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Allow logging to be used in SPL reliablySimon Glass1-0/+13
When global_data is relocated, log_head moves in memory, meaning that the items in that list point to the wrong place. Disable logging when making the change, then reenable it afterwards, so that logging works normally. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Init video in SPL if enabledSimon Glass1-0/+9
When video is required in SPL, set this up ready for use. Ignore any problems since it may be that video is not actually available and we still want to continue on to U-Boot proper in that case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Ensure SPL banner is only shown onceSimon Glass1-1/+7
Print the banner in SPL init only if the spl_board_init() function isn't enabled. The spl_board_init() function is in the same file, but is called later, by board_init_r(). This avoids printing two banners, which causes tests to fail. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Allow video-BIOS code to be built for SPLSimon Glass2-4/+5
With qemu-x86_64 we need to run the video BIOS while in 32-bit mode, i.e. SPL. Add a Kconfig option for this, adjust the Makefile rules and use CONFIG_IS_ENABLED() where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Show an error when a BIOS exception occursSimon Glass1-1/+1
Rather than silently hanging, show an error first. This can happen when there is something wrong with the video BIOS. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Correct get_sp() implementation for 64-bitSimon Glass1-1/+1
Use an assembler implementation as is done for i386, so that the results are equivalent for i386 and x86_64. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Show the CPU physical address size with bdinfoSimon Glass1-0/+1
This is useful information so show it with the bdinfo command. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Allow listing MTRRs in SPLSimon Glass1-0/+7
Move MTRR-listing code into a common file so it can be used from SPL. Update the 'mtrr' command to call it. Use this in SPL just before adjusting the MTRRs, so we can see the state set up by the board. Only show it when debug is enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: zimage: Export the function to obtain the cmdlineSimon Glass1-3/+8
Allow reading the command line from a zimage, so that it can be recorded in the bootflow. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-17x86: Add a function to boot a zimageSimon Glass1-11/+71
Add a direct interface to booting a zimage, so that bootstd can call it without going through the command-line interface. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11spl: Commit MTRRs only in board_init_f_r()Simon Glass1-1/+0
We don't need to commit the SPI-flash MTRR change immediately, since it is now done in the board_init_f_r(). Also this causes chromebook_link64 to hang, presumably since we are still running from CAR (Cache-as-RAM) in SPL. Coral handles this OK, perhaps since it is running from a different memory area, but it has no effect on Coral anyway. Drop the extra mtrr_commit() in the SPL implementation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11x86: spl: Avoid using init_cache_f_r() from SPLSimon Glass1-1/+2
This function is used by U-Boot proper. It does not set up MTRRs when SPL is enabled, but we do want this done when it is called from SPL. In fact it is confusing to use the same function from SPL, since there are quite a few conditions there. All init_cache_f_r() really does is commit the MTRRs and set up the cache. Do this in the SPL's version of this function instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11x86: Tidy up address for loading U-Boot from SPLSimon Glass1-10/+3
Use the binman symbols for this, to avoid hard-coding the value. We could use CONFIG_X86_OFFSET_U_BOOT for the address, but it seems better to obtain the offset and size through the same mechanism. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11x86: spl: Show debugging for BSSSimon Glass1-0/+2
Show the area of memory cleared for BSS, when debugging is enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11x86: mrc: Correct SPL debug messageSimon Glass1-1/+1
SPL printf() does not normally support %#x so just use %x instead. Hex is expected in U-Boot anyway. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11x86: Tidy up availability of string functionsSimon Glass1-1/+3
For now, just enable the fast-but-large string functions in 32-boot U-Boot proper only. Avoid using them in SPL. We cannot use then in 64-bit builds since we only have 32-bit assembly. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2023-05-11dm: Emit the arch_cpu_init_dm() even only before relocationSimon Glass1-1/+1
The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11x86: coreboot: Show unimplemented sysinfo tagsSimon Glass1-0/+2
Sometimes coreboot adds new tags that U-Boot does not know about. These are silently ignored, but it is useful to at least know what we are missing. Add a way to collect this information. For Brya it shows: Unimpl. 38 41 37 34 42 40 These are: LB_TAG_PLATFORM_BLOB_VERSION LB_TAG_ACPI_CNVS LB_TAG_FMAP LB_TAG_VBOOT_WORKBUF LB_TAG_TYPE_C_INFO LB_TAG_BOARD_CONFIG Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11x86: coreboot: Collect the address of the ACPI tablesSimon Glass1-0/+11
At present any ACPI tables created by prior-stage firmware are ignored. It is useful to be able to view these in U-Boot. Pick this up from the sysinfo tables and display it with the cbsysinfo command. This allows the 'acpi list' command to work when booting from coreboot. Adjust the global_data condition so that acpi_start is available even if table-generation is disabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2023-03-25x86: Exit EFI boot services before starting kernelSimon Glass1-0/+18
When running the EFI app, we need to exit boot services before jumping to Linux. At some point it may be possible to jump to Linux and pass on the system table, and: * install the device-tree as configuration table * use LoadImage() to load the kernel image (e.g. from memory) * start the image with StartImage() This should allow the Linux efistub to be used. For now, this is not implemented. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25x86: Support booting a 64-bit kernel from 64-bit U-BootSimon Glass2-10/+30
Add the missing code to handle this. For a 64-bit kernel the entry address is 0x200 bytes after the normal entry. Rename the parameter to boot_linux_kernel() accordingly. Update the comments to indicate that these are addresses, not pointers. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25x86: Adjust bootparam.h to be more like linuxSimon Glass1-1/+1
This likely came from Linux originally, so update it to match v6.2 more. This has no functional change. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-13x86: Add a few more items to bdinfoSimon Glass1-0/+6
Add the timer and vendor/model information. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-13efi: Support a 64-bit frame buffer addressSimon Glass1-1/+1
The current vesa structure only provides a 32-bit value for the frame buffer. Many modern machines use an address outside the range. It is still useful to have this common struct, but add a separate frame-buffer address as well. Add a comment for vesa_setup_video_priv() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10Correct SPL uses of LMBSimon Glass1-1/+1
This converts 9 usages of this option to the non-SPL form, since there is no SPL_LMB defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10Correct SPL uses of BOOTSTAGE_REPORTSimon Glass1-1/+1
This converts 2 usages of this option to the non-SPL form, since there is no SPL_BOOTSTAGE_REPORT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10x86: Correct Chrromebook typoSimon Glass1-1/+1
Fix a typo in a comment. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18x86: Fix saying arch_cpu_init_dm in debug/docsTom Rini1-1/+1
The function arch_cpu_init_dm was renamed to fsp_setup_pinctrl in these cases, so rename debug / docs to match. Cc: Simon Glass <sjg@chromium.org> Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-09x86: fsp: Only compile fsp_save_s3_stack if (SPL_)DM_RTC is enabledSean Anderson1-0/+2
This function calls rtc_write32, which has a different signature depending on if (SPL_)DM_RTC is enabled or not. This could result in a mismatch in SPL if DM_RTC was enabled but SPL_DM_RTC, as the non-DM declaration would still be used in SPL even though the implementation would be for non-DM_RTC. We are switching to the correct definitions in the next commit, so this will become a compilation error. Since fsp_save_s3_stack is not called from SPL, avoid compiling it if (SPL_)DM_RTC is disabled. Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-12-06global: Move remaining CONFIG_SYS_* to CFG_SYS_*Tom Rini1-1/+1
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-31Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASESimon Glass2-6/+6
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-18dm: treewide: Use uclass_first_device_err when accessing one deviceMichal Suchanek1-3/+1
There is a number of users that use uclass_first_device to access the first and (assumed) only device in uclass. Some check the return value of uclass_first_device and also that a device was returned which is exactly what uclass_first_device_err does. Some are not checking that a device was returned and can potentially crash if no device exists in the uclass. Finally there is one that returns NULL on error either way. Convert all of these to use uclass_first_device_err instead, the return value will be removed from uclass_first_device in a later patch. Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-29treewide: Drop image_header_t typedefSimon Glass1-1/+1
This is not needed and we should avoid typedefs. Use the struct instead and rename it to indicate that it really is a legacy struct. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29treewide: Drop bootm_headers_t typedefSimon Glass1-3/+3
This is not needed and we should avoid typedefs. Use the struct instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-23board_f: Fix types for board_get_usable_ram_top()Pali Rohár2-2/+2
Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-12video: Rename structs and functions to avoid VBESimon Glass2-6/+6
Rename these to VESA, itself an abbreviation, to avoid a conflict with Verified Boot for Embedded. Rename this to avoid referencing VBE. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12video: Renname vbe.h to vesa.hSimon Glass3-3/+3
We want to use VBE to mean Verfiied Boot for Embedded in U-Boot. Rename the existing VBE (Vesa BIOS extensions) to allow this. Verified Boot for Embedded is documented doc/develop/vbe.rst Signed-off-by: Simon Glass <sjg@chromium.org>
2022-07-26zynqmp: Run board_get_usable_ram_top() only on main U-BootAshok Reddy Soma1-3/+2
With commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location"), the function board_get_usable_ram_top() is allocating MMU_SECTION_SIZE of about 2MB using lmb_alloc(). But we dont have this much memory in case of mini U-Boot. Keep these functions which use lmb under CONFIG_LMB so that they are compiled and used only when LMB is enabled. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/75e52def75f573e554a6b177a78504c128cb0c4a.1657183534.git.michal.simek@amd.com
2022-06-23linker_lists: Rename sections to remove . prefixAndrew Scull2-4/+4
Rename the sections used to implement linker lists so they begin with '__u_boot_list' rather than '.u_boot_list'. The double underscore at the start is still distinct from the single underscore used by the symbol names. Having a '.' in the section names conflicts with clang's ASAN instrumentation which tries to add redzones between the linker list elements, causing expected accesses to fail. However, clang doesn't try to add redzones to user sections, which are names with all alphanumeric and underscore characters. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-04Merge branch 'next'Tom Rini3-13/+6
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-31Revert "x86: Move FACP table into separate functions"Andy Shevchenko1-0/+15
Before the culprit patch (see BugLink for the details): => acpi list Name Base Size Detail ---- -------- ----- ------ RSDP 000e4500 24 v02 U-BOOT RSDT 000e4530 38 v01 U-BOOT U-BOOTBL 20220401 INTL 0 XSDT 000e45e0 4c v01 U-BOOT U-BOOTBL 20220401 INTL 0 CSRT 000e5490 58 v00 U-BOOT U-BOOTBL 20220401 INTL 0 FACP 000e54f0 114 v06 U-BOOT U-BOOTBL 20220401 INTL 0 DSDT 000e4780 c06 v02 U-BOOT U-BOOTBL 10000 INTL 20200925 FACS 000e4740 40 MCFG 000e5610 3c v01 U-BOOT U-BOOTBL 20220401 INTL 0 SPCR 000e5650 50 v02 U-BOOT U-BOOTBL 20220401 INTL 0 APIC 000e56a0 48 v02 U-BOOT U-BOOTBL 20220401 INTL 0 After the culprit patch: => acpi list Name Base Size Detail ---- -------- ----- ------ RSDP 000e4500 24 v02 U-BOOT RSDT 000e4530 34 v01 U-BOOT U-BOOTBL 20220401 INTL 0 XSDT 000e45e0 44 v01 U-BOOT U-BOOTBL 20220401 INTL 0 CSRT 000e53a0 58 v00 U-BOOT U-BOOTBL 20220401 INTL 0 MCFG 000e5520 3c v01 U-BOOT U-BOOTBL 20220401 INTL 0 SPCR 000e5560 50 v02 U-BOOT U-BOOTBL 20220401 INTL 0 APIC 000e55b0 48 v02 U-BOOT U-BOOTBL 20220401 INTL 0 As a result Linux kernel can't find mandatory tables and fails to boot. Hence, revert it for good. This reverts commit 379d3c1fd6aa490b1ad5697525cfc89b615cf25a. BugLink: https://lore.kernel.org/all/20220131225930.GJ7515@bill-the-cat/ Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-03-10event: Convert arch_cpu_init_dm() to use eventsSimon Glass3-13/+6
Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-09acpi: Move MCFG implementation to common libMoritz Fischer1-54/+0
MCFG tables are used on multiple arches. Move to common ACPI lib. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Moritz Fischer <moritzf@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> Use sizeof(*mcfg) instead of sizeof(*header) Signed-off-by: Simon Glass <sjg@chromium.org>
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