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2019-11-20Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xxTom Rini7-10/+54
- Fix CONFIG_AHCI related build warning for P2041, P3041, P5040, T102x, T104x, T4240 platforms
2019-11-19arm: arm11: allow unaligned memory accessHeinrich Schuchardt2-0/+29
The UEFI spec mandates that unaligned memory access should be enabled if supported by the CPU architecture. This patch implements the function unaligned_access() to set the enable unaligned data support flag and to clear the aligned flag in the system control register (SCTLR). It is called when UEFI related commands like bootefi are invoked. Reported-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Tested-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Tested-by: Guillaume Gardet <Guillaume.Gardet@arm.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-11-19powerpc: t4240: dts: Add Sata DT nodesPeng Ma1-0/+9
This patch is to add sata node for T4240 platform Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-19powerpc: t104x: dts: Add Sata DT nodesPeng Ma1-0/+9
This patch is to add sata node for T104x platform Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-19powerpc: t102x: dts: Add Sata DT nodesPeng Ma1-0/+9
This patch is to add sata node for T102x platform Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-19powerpc: p5040: dts: Add Sata DT nodesPeng Ma1-0/+9
This patch is to add sata node for P5040 platform Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-19powerpc: p3041: dts: Add Sata DT nodesPeng Ma1-0/+9
This patch is to add sata node for P3041 platform Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-19powerpc: p2041: dts: Add Sata DT nodesPeng Ma1-0/+9
This patch is to add sata node for P2041 platform Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-19ata: fsl_sata: Add DM support for Freescale PowerPC SATA driverPeng Ma1-10/+0
Add DM support for Freescale PowerPC sata driver used for PowerPC T series SoCs, CONFIG_BLK needs to be enabled on these platforms. It adds the SATA controller as AHCI device, which is strictly speaking not correct, as the controller is not AHCI compatible, But the U-Boot AHCI uclass interface enables the usage of this DM driver, Also fix below warning while PowerPC T series boards compilation, ===================== WARNING ======================" This board does use CONFIG_LIBATA but has CONFIG_AHCI not" enabled. Please update the storage controller driver to use" CONFIG_AHCI before the v2019.07 release." Failure to update by the deadline may result in board removal." See doc/driver-model/MIGRATION.txt for more info." ====================================================" Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-18Merge tag 'video-for-v2020.01-rc2' of ↵Tom Rini2-12/+0
https://gitlab.denx.de/u-boot/custodians/u-boot-video - fix i.MX6ULL evk black screen observed while reboot stress tests - remove "synopsys,dw-mipi-dsi" compatible to reduce the device tree differences between Linux and U-Boot for stm32mp1 platform
2019-11-18Merge tag 'u-boot-rockchip-20191118' of ↵Tom Rini81-598/+8237
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Add support for rockchip SoC: PX30, RK3308 - Add and migrate to use common dram driver: PX30, RK3328, RK3399 - Add rk3399 board Tinker-s support - Board config update for Rock960, Rockpro64
2019-11-18Merge tag 'dm-pull-14nov19' of git://git.denx.de/u-boot-dmTom Rini1-2/+2
Add OP-TEE test swuit Fix patman cc_file output Minor sandbox/pinctrl changes
2019-11-17rockchip: dts: tinker: Add tinker-s board supportMichael Trimarchi3-0/+64
Support tinker-s board. The board is equivalent of tinker board except of emmc. TODO: - support of usb current burst when the board is powered from pc Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: dts: tinker: Move u-boot dmc initialization to specific sectionMichael Trimarchi2-12/+12
dmc is used to initialize the memory controller. It's needed by u-boot. Move it in the specific section Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: imply instead of selecting SPL_SYS_MALLOC_SIMPLEThomas Hebb1-1/+1
We shouldn't force which allocator the SPL uses, since there's no platform requirement for one over the other: in fact, we currently allow selection of the TPL allocator but not the SPL one! Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: allow DRAM init in SPLThomas Hebb1-2/+2
The common SPL removed SoC-specific code for RK3399's SPL and in the process caused the previously-unconditional DRAM initialization in board_init_f() to only happen when compiling a configuration that does not support TPL, meaning DRAM never gets initialized if TPL is supported but disabled. Fix this by omitting the DRAM init in SPL only when we are configured to also build a TPL. This fixes custom configurations that have disabled TPL, and it should also unbreak the "ficus-rk3399", "rock960-rk3399", and "chromebook_bob" defconfigs, although since I don't have any of those devices I can't confirm they're broken now. Fixes: b7abef2ecbcc ("rockchip: rk3399: Migrate to use common spl board file") Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: SPL: fix ordering of DRAM initThomas Hebb1-7/+7
The common SPL code reordered the DRAM initialization before rockchip_stimer_init(), which as far as I can tell causes the RK3399 to lock up completely. Fix this issue in the common code by putting the DRAM init back after timer init. I have only tested this on the RK3399, but it wouldn't make any sense for the timer init to require DRAM be set up on any system. Fixes: b7abef2ecbcc ("rockchip: rk3399: Migrate to use common spl board file") Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3308: Add support for ROC-RK3308-CC boardAndy Yan1-0/+5
ROC-RK3308-CC is a rk3308 based board designed by Firelfy, with eMMC and 256MB DDR3 and RTL8188 Wifi on board. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3308: Add dts for ROC-RK3308-CCAndy Yan3-1/+209
Add dts file for ROC-RK3308-CC from firefly. Sync form linux rockchip for v5.5-armsoc/dts64: "arm64: dts: rockchip: Add devicetree for board roc-rk3308-cc" (sha1: 4403e1237be3af0977aa23ef399e3496316317a0) Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17board: rockchip: Add rk3308 evb supportAndy Yan1-0/+8
Add support for rk3308 evaluation board. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rockchip: Add dts for rk3308 evbAndy Yan5-0/+2104
Add dts for rk3308 evb, sync from the linux kernel upstream list [0]. [0]https://patchwork.kernel.org/patch/11201555/ Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: rockchip: Add RK3308 SOC supportAndy Yan11-0/+783
RK3308 is a quad Cortex A35 based SOC with rich audio interfaces(I2S/PCM/TDM/PDM/SPDIF/VAD/HDMI ARC), which designed for intelligent voice interaction and audio input/output processing. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: clk: pll: add common pll setting funcsElaine Zhang1-0/+76
Common PLL setup function, compatible with different SOC. Mainly for the subsequent new SOC use. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: orangepi: Add init value for vdd_logKever Yang1-0/+4
We should set the init value when vdd_log is enabled, or else the vdd_log output voltage may not in soc required range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: khadas-edge: Add init value for vdd_logKever Yang1-0/+4
We should set the init value when vdd_log is enabled, or else the vdd_log output voltage may not in soc required range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: rock-pi4: Add init value for vdd_logKever Yang1-0/+4
We should set the init value when vdd_log is enabled, or else the vdd_log output voltage may not in soc required range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm64: dts: rk3399-rock960: add vdd_log and its init valueKever Yang1-0/+13
Add vdd_log node according to rock960 schematic V13. This patch affect two boards: - Rock960 Model A - Ficus Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-11-17rockchip: dts: rk3399-firefly: move u-boot, spl-boot-order to to the u-boot.dtsiPeter Robinson2-1/+6
The u-boot specific device tree directives should be in u-boot.dtsi Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: dts: rk3399-evb: move u-boot, spl-boot-order to to the u-boot.dtsiPeter Robinson2-2/+6
The u-boot specific device tree directives should be in u-boot.dtsi Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: dts: rk3399: move the u-boot, dm-pre-reloc to the u-boot.dtsiPeter Robinson2-11/+48
The u-boot specific pieces in the dts files should be in u-boot.dtsi not the main files, this allows easier sync with upstream. The rk3399.dtsi has a mix of both so move them all for consistency. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Fix with missing pmugrf) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: split rockpro64 out of evb_rk3399Vasily Khoruzhick1-0/+20
rockpro64 needs to setup I/O domains in order for USB to work in u-boot. Since we currently don't have a driver to do that, split it into its own board file and initialize I/O domains here. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: clk: rv1108: remove duplicate reset initHeiko Stuebner1-6/+0
rockchip_reset_bind() already does the needed init for the reset registers, only referenced the wrong cru structure. So we can get rid of the open-coded reset init and just fix the correct cru reference. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rk3399-rockpro64: slightly increase center voltageSoeren Moch1-0/+5
The rk3399 VD_CENTER voltage domain is not subject to dynamic voltage scaling. So the regulator reset voltage of 0.9V is used on this board. Let u-boot initialize the center voltage to 0.95V as it is done for the VD_LOGIC domain. This avoids instability and occasional linux kernel Opses on this board. Signed-off-by: Soeren Moch <smoch@web.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rk3399-rockpro64: sync dts from linux kernelSoeren Moch1-8/+49
The most important change for u-boot is the fix for the vdd-log pwm voltage regulator to avoid overvoltage for the VD_LOGIC power domain. Signed-off-by: Soeren Moch <smoch@web.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rk3399-roc-pc: Sync latest dts changes from LinuxJagan Teki1-16/+16
Few important regulator power rails fixes are available in linux-next, so sync them same. Here is the last commit details: commit <9f7f9b610e1b7d2dc86c543ab0dfcf781bd42326> ("arm64: dts: rockchip: Fix roc-rk3399-pc regulator input rails") Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Levin Du <djw@t-chip.com.cn> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: Init driver otg_data for rk3288 usb phyKever Yang1-0/+28
RK3288 needs to init the otg_data in board level to make the phy driver work. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: usb: Migrate to use ofnodeKever Yang1-8/+6
Migrate to use ofnode_* instead of fdt_* so that we may able to use live dt for usb udc driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add px30 architecture coreHeiko Stuebner10-0/+492
Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add px30 devicetreesHeiko Stuebner4-0/+2682
Add px30 related devicetrees synced from the Linux kernel. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: misc: read cpuid either from efuse or otpHeiko Stuebner1-1/+6
Newer Rockchip socs use a different ip block to handle one-time- programmable memory, so depending on what got enabled get the cpuid from either source. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: clk: add px30 clock driverKever Yang1-0/+432
The px30 contains 2 separate clock controllers, pmucru and cru. Add drivers for them. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add core px30 headersHeiko Stuebner1-0/+144
Add headers needed by the upcoming px30 support, including two new dt-binding headers taken from the Linux kernel. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17spl: separate SPL_FRAMEWORK config for spl and tplHeiko Stuebner4-3/+5
Right now enabling SPL_FRAMEWORK will also enable it for the TPL in all cases, making the TPL bigger. There may be cases where the TPL is really size constrained due to its underlying ram size. Therefore introduce a new TPL_FRAMEWORK option and make the relevant conditionals check for both. The default is set to "y if SPL_FRAMEWORK" to mimic the previous behaviour where the TPL would always get the SPL framework if it was enabled in SPL. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: update calculate_strideKever Yang1-0/+9
Update the calculation of the stride to support all the DRAM case. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: migrate to use common codeYouMin Chen9-56/+61
For there are some structures and functions are common for all rockchip SoCs, migrate to use the common code so that we can clean up reduandent codes. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3328: use common sdram driverYouMin Chen5-298/+134
RK3328 has a similar controller and phy with PX30, so we can use the common driver for it and remove the duplicate codes. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: px30: add sdram driverYouMin Chen1-0/+134
Add the sdram driver for PX30 to support ddr3, ddr4, lpddr2 and lpddr3. For TPL_BUILD, the driver implement full dram init and without DM support due to the limit of internal SRAM size. For SPL and U-Boot proper, it's a simple driver with dm for get dram_info like other SoCs. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: add common msch reg definitionKever Yang1-0/+85
The noc register bit definition may be the same for different SoC while the offset of the register may be different, add the struction definition as common code. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: add phy driver code for PX30Kever Yang2-0/+121
This sdram_phy_px30.c is based on PX30 SoC, the functions are common for phy, other SoCs with similar hardware could re-use it. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rockchip: add controller code for PX30Kever Yang1-0/+139
This sdram_pctl_px30.c is based on PX30 SoC, the functions are common for controller, other SoCs with similar hardware could re-use it. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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