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2022-03-16Merge tag 'xilinx-for-v2022.07-rc1' of ↵Tom Rini11-44/+115
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2022.07-rc1 microblaze: - Add support for reserved memory xilinx: - Update FRU code with MAC reading zynqmp: - Remove double AMS setting - DT updates (mostly for SOMs) - Add support for zcu106 rev 1.0 zynq: - Update nand binding nand: - Aligned zynq_nand to upstream DT binding net: - Add support for ethernet-phy-id mmc: - Workaround CD in zynq_sdhci driver also for ZynqMP - Add support for dynamic/run-time SD config for SOMs gpio: - Add driver for slg7xl45106 firmware: - Add support for dynamic SD config power-domain: - Update zynqmp driver with the latest firmware video: - Add skeleton driver for DP and DPDMA i2c: - Fix i2c to work with QEMU pinctrl: - Add driver for zynqmp pinctrl driver
2022-03-16arm64: zynqmp: Add pinctrl emmc description to SM-K26Michal Simek1-0/+20
Production SOM has emmc on it and make sense to describe pin description to be able use EMMC if it is not configured via psu_init. (Still some regs are not handled but this is one step in that direction) Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/3545a0f08d342de98efc82b78f5725eda091555a.1647267969.git.michal.simek@xilinx.com
2022-03-15Merge tag 'v2022.04-rc4' into nextTom Rini15-196/+192
Prepare v2022.04-rc4
2022-03-14Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini2-2/+7
- kwboot: Misc minor improvement and fixes, e.g. mix of arguments (Pali) - PCI: a37xx: Remap IO space to bus address 0x0 (Pali)
2022-03-14arm64: zynqmp: Fix i2c addresses for zynqmp-p-a2197Michal Simek1-4/+4
After double checking some i2c addresses are not correct. It is visible from i2c dump ZynqMP> i2c bus Bus 3: i2c@ff020000 74: i2c-mux@74, offset len 1, flags 0 Bus 5: i2c@ff020000->i2c-mux@74->i2c@0 Bus 6: i2c@ff020000->i2c-mux@74->i2c@2 Bus 7: i2c@ff020000->i2c-mux@74->i2c@1 Bus 8: i2c@ff020000->i2c-mux@74->i2c@3 Bus 4: i2c@ff030000 (active 4) 74: i2c-mux@74, offset len 1, flags 0 Bus 9: i2c@ff030000->i2c-mux@74->i2c@0 Bus 10: i2c@ff030000->i2c-mux@74->i2c@3 Bus 11: i2c@ff030000->i2c-mux@74->i2c@4 Bus 12: i2c@ff030000->i2c-mux@74->i2c@5 (active 12) 51: generic_51, offset len 1, flags 0 60: generic_60, offset len 1, flags 0 74: generic_74, offset len 1, flags 0 Bus 13: i2c@ff030000->i2c-mux@74->i2c@6 (active 13) 51: generic_51, offset len 1, flags 0 5d: generic_5d, offset len 1, flags 0 74: generic_74, offset len 1, flags 0 ZynqMP> i2c dev 4 Setting bus to 4 ZynqMP> i2c mw 74 0 18 ZynqMP> i2c probe Valid chip addresses: 18 36 37 50 51 60 74 ZynqMP> i2c mw 74 0 20 ZynqMP> i2c probe Valid chip addresses: 51 60 74 where it is clear that si570 (u5) is at 0x60 address and 8t49n240 (u39) is also at address 0x60 based on log above. i2c address 0x74 is i2c mux and 0x51 is eeprom. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/0a198e9d993411e41473d130d5a5c20b6dc83458.1646639616.git.michal.simek@xilinx.com
2022-03-14arm: a37xx: Remap IO space to bus address 0x0Pali Rohár2-2/+7
Remap PCI I/O space to the bus address 0x0 in the Armada 37xx device-tree in order to support legacy I/O port based cards which have hardcoded I/O ports in low address space. Some legacy PCI I/O based cards do not support 32-bit I/O addressing. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-14x86: Add an enum name for the GNVS firmware typeSimon Glass1-1/+7
This enum is currently anonymous. Add a name so it can be used in the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-03-12Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spiTom Rini2-3/+2
- sunXi SPI fixups (Andre) - bcm iproc qspi (Rayagonda)
2022-03-10arm: add initial support for the Phytium Pomelo Boardweichangzheng3-0/+71
This adds platform code and the device tree for the Phytium Pomelo Board. The initial support comprises the UART and the PCIE. Signed-off-by: weichangzheng <nicholas_zheng@outlook.com>
2022-03-10ARM: mach-omap2: omap3: Make clock functions staticAdam Ford1-2/+2
get_osc_clk_speed and get_sys_clkin_sel are only used in one file. Make them static. Tested on OMAP3530, DM3730, AM3517. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-03-10ARM: dts: am3517-evm: Sync DTS with Linux 5.17-rc5Adam Ford4-42/+47
Sync the am3517-evm device tree files with those from Linux 5.17-rc5 with some additional fixes for pinmuxing Ethernet and moving the pinmux references to the respective peripherals. Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
2022-03-10ARM: dts: logicpd-torpedo: Resyc DTS files with Linux 5.17-rc5Adam Ford4-34/+103
Resyc DTS files with Linux 5.17-rc5. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-03-10ARM: dts: logicpd-som-lv: Resync DTS files with Linux 5.17-rc5Adam Ford4-43/+45
Resync the DTS files for the Logic PD SOM-LV with Linux 5.17-rc5 with some additional pending changes to address issues with wrong pin-muxing on the OMAP35. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-03-10event: Convert arch_cpu_init_dm() to use eventsSimon Glass21-26/+67
Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10event: Convert misc_init_f() to use eventsSimon Glass1-1/+3
This hook can be implmented using events, for the three boards that actually use it. Add the event type and event handlers. Drop CONFIG_MISC_INIT_F since we can just use CONFIG_EVENT to control this. Since sandbox always enables CONFIG_EVENT, we can drop the defconfig lines there too. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10sandbox: start: Sort the header filesSimon Glass1-2/+2
These header files don't follow the correct order. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10sunxi: Kconfig: Fix up SPI configurationAndre Przywara2-3/+2
Commit 7945caf22c44 ("arm: sunxi: Enable SPI/SPI-FLASH support for A64") selected CONFIG_SPI by default on all Allwinner A64 boards, even though only 4 out of the 14 A64 boards have a SPI flash chip. All other SoCs had to manually select DM_SPI and friends, even though they are a platform property (the sunxi SPI driver is DM_SPI only). Clean this up to allow easy selection of SPI flash support in U-Boot proper, by selecting DM_SPI and DM_SPI_FLASH *if* CONFIG_SPI is selected, for *all* Allwinner SoCs. This simplifies the defconfig for two Libretech boards already. Also remove the forced CONFIG_SPI from the A64 Kconfig, instead let the four boards which allow SPI booting select this explicitly. Any board wishing to support SPI flash in U-Boot proper now just defines CONFIG_SPI and CONFIG_SPI_FLASH_<vendor> in its defconfig, Kconfig takes care of the rest. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-03-09arm64: zynqmp: add support for zcu106 rev1.0Neal Frager2-0/+17
This patch adds psu_init for Xilinx ZCU106 rev1.0. Xilinx ZCU106 rev1.0 has newer x16 DDR4 memories and it is SW compatible with revA. Signed-off-by: Neal Frager <neal.frager@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/997b3e23457e4d24ce0e197d742382aaec36c2b2.1646230318.git.michal.simek@xilinx.com
2022-03-07ARM: dts: ast2500: Add ngpios property to GPIO nodeAndrew Jeffery1-0/+1
Populate gpio_count in the gpio subsystem for the AST2500. Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
2022-03-07arm: dts: Add DTS description for MMC2 am33xx devicesLukasz Majewski1-9/+30
This code has been ported from Linux v5.16.9 arch/arm/boot/dts/am33xx.dtsi file to allow correct usage of MMC2 controller in U-Boot. This IP block is a bit specific as it is connected to L3 interconnect bus, whereas mmc[01] are connected to L4. Proper configuration of this block (including providing clock) is handled in ti-sysc.c driver. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2022-03-07arm: dts: Add mmc[01] aliases to am33xx.dtsiLukasz Majewski1-0/+2
This change provides similar aliases definitions as now present in Linux kernel v5.16.9 for am33xx.dtsi file. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2022-03-07arch: arm: dts: bcm96753ref: enable led supportPhilippe Reynes1-0/+18
Enable the led in the device tree of the refboard bcm96753ref. It also defines two leds (led_red ad led_green). Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07arch: arm: dts: bcm6753: add led supportPhilippe Reynes1-0/+7
Add a node leds to support the LED IP in the device tree of the bcm6753. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07bcm96753ref: add initial supportPhilippe Reynes3-0/+84
This add the initial support of the broadcom reference board bcm96753ref with a bcm6753 SoC. This board has 1 GB of RAM, 256 MB of flash (nand), 2 USB port, 1 UART, and 4 ethernet ports. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07bcm6753: add initial supportPhilippe Reynes2-0/+208
This add the initial support of the broadcom bcm6753 SoC family. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07arm64: zynqmp: Fix level of gpio reset for usb on kv260 boardsMichal Simek2-2/+2
Active level is low that's why it should be fixed. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/86b3a96ce990b0ee0adab221146b5a5c751bd4a9.1645629459.git.michal.simek@xilinx.com
2022-03-07arm64: zynqmp: Enable DP driver for SOMsMichal Simek2-1/+5
The main reason is to send pmufw cfg overlay from U-Boot to PMUFW to enable access to DP. Overlay is sent when cls command is called and for that IP has to be enabled in carrier cards. And IP needs to be also enabled in SOM dt because with DTB reselection new DT is not parsed in pre reloc U-Boot instance. It is called from board_f via embedded_dtb_select(). That's why bind function is not able to allocate memory and it ends up with error: "Video device 'display@fd4a0000' cannot allocate frame buffer memory -ensure the device is set up before relocation" To avoid this situation DP is placed also to SOM where bind function is called and frame buffer memory is allocated and just reused after DTB reselection. Result is the same. There could be a problem in Linux with different DP configurations but that's need to be solved there because console should be on from u-boot already. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/c4f31641f917fddb09d976f56875057c658f264c.1645629459.git.michal.simek@xilinx.com
2022-03-07arm64: zynqmp: Switch to ethernet-phy-id in kv260Michal Simek2-4/+8
Use ethernet-phy-id compatible string to properly describe phy reset on kv260 boards. Previous description wasn't correct because reset was done for mdio bus to operate and it was in this case used for different purpose which was eth phy reset. With ethernet-phy-id phy reset happens only for the phy via phy framework. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/73b64f1a2b873b4e26bd2b365364bdf313794ae2.1645629459.git.michal.simek@xilinx.com
2022-03-07arm64: zynqmp: Use assigned-clock-rates for setting up clock in SOMMichal Simek4-0/+10
With limited low level configuration done via psu-init only IPs connected on SOM are initialized and configured. All IPs connected to carrier card are not initialized. There is a need to do proper reset, pin configuration and also clock setting. The patch targets the last part which is setting up proper clock for USBs and SDs. Also setup proper bus width for SD cards. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/d9f80b2551bd246c3d7ecb09b516806c8dc83ed9.1645629459.git.michal.simek@xilinx.com
2022-03-07arm64: zynqmp: Setup clock for DP and DPDMAMichal Simek3-0/+8
Clocks are coming from shared HW design where these frequencies should be aligned with PLL setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/04454c50d0d13e450976942085d763ab5aa38f98.1645629459.git.michal.simek@xilinx.com
2022-03-07arm64: zynqmp: Move usb hub from i2c to usb nodeMichal Simek1-5/+8
Based on upstream discussion based on link below usb hub should be placed to usb node directly as child node. Based on this Linux driver was updated and the same change should be also reflected in kv260 board. Link: https://lore.kernel.org/all/CAL_JsqJZBbu+UXqUNdZwg-uv0PAsNg55026PTwhKr5wQtxCjVQ@mail.gmail.com/ Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/aa18df1978f161b933e6cdc6cd99c807b5f74398.1645629459.git.michal.simek@xilinx.com
2022-03-07microblaze: Do not place u-boot to reserved memory locationMichal Simek1-0/+2
Microblaze can also have reserved space in DT which u-boot has to avoid to placing self to that location. The same change was done in Zynqmp by commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location"). This feature was tested with this memory description on kc705: memory { device_type = "memory"; reg = <0x80000000 0x40000000>; }; reserved-memory { #address-cells = <1>; #size-cells = <1>; ranges; alloc@b00000000 { reg = <0xb0000000 0x10000000>; no-map; }; alloc@a8000000 { reg = <0xa8000000 0x00010000>; no-map; }; }; And in U-Boot log you can check u-boot relocation address and reserved locations. U-Boot 2022.01-03974-gb1b4c2dea9b9 (Feb 25 2022 - 11:59:48 +0100) Model: Xilinx MicroBlaze DRAM: 1 GiB Flash: 128 MiB Loading Environment from nowhere... OK In: serial Out: serial Err: serial Model: Xilinx MicroBlaze Net: AXI EMAC: 40c00000, phyaddr 7, interface gmii eth0: ethernet@40c00000 U-BOOT for microblaze-generic U-Boot-mONStR> bdi ... DRAM bank = 0x00000000 -> start = 0x80000000 -> size = 0x40000000 ... relocaddr = 0xaff69000 ... lmb_dump_all: memory.cnt = 0x1 memory[0] [0x80000000-0xbfffffff], 0x40000000 bytes flags: 0 reserved.cnt = 0x3 reserved[0] [0xa8000000-0xa800ffff], 0x00010000 bytes flags: 4 reserved[1] [0xafe87bb0-0xafffffff], 0x00178450 bytes flags: 0 reserved[2] [0xb0000000-0xbfffffff], 0x10000000 bytes flags: 4 Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/ea0a8ccce723478eb518f6fdceb91d4f129efb68.1646122398.git.michal.simek@xilinx.com
2022-03-07ARM: dts: zynq: add NAND flash controller nodeMichael Walle3-29/+32
Recently, a driver for the ARM Primecell PL35x static memory controller (including NAND controller) was added in linux. Add the corresponding device tree node. Also update cfi-flash registers and location in DT. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20210616155437.27378-3-michael@walle.cc Link: https://lore.kernel.org/r/ee81d3846a1ce93f240d61537d404796e5599c1c.1645625433.git.michal.simek@xilinx.com
2022-03-06Merge https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini6-37/+67
- Fix ARMv5/F1C100 FEL booting - Fix F1C100 reset - Introduce proper F1C100 boot method detection - Enable SPI booting for F1C100 Boot tested from FEL, SPI, SD card and eMMC (where applicable) on Pine64-LTS, Pine-H64, BananaPi M1, OrangePi Zero, LicheePi Nano(F1C100).
2022-03-04arm: dts: iot2050: Add cfg register space for ringacc and udmapJan Kiszka1-1/+24
Recent unrelated fixes (9876ae7db6da) revealed that we were missing bits from 2af181b53e28 in the IOT2050 dt. Add them, but only for main U-Boot. SPL loads from QSPI only, thus cannot use DMA. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-03-04arm: mach-k3: am6_init: Use CONFIG_TI_I2C_BOARD_DETECTChristian Gmeiner1-1/+2
We only want to call do_board_detect() if CONFIG_TI_I2C_BOARD_DETECT is set. Same as done for am64. This makes it possible to add a custom am65 based board design to U-Boot that does not use this board detection mechanism. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2022-03-04arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function againPali Rohár1-26/+55
The a3700_fdt_fix_pcie_regions() function still computes nonsense. It computes the fixup offset from the PCI address taken from the first row of the "ranges" array, which means that: - PCI address must equal CPU address (otherwise the computed fix offset will be wrong), - the first row must contain the lowest address. This is the case for the default device-tree, which is why we didn't notice it. It also adds the fixup offset to all PCI and CPU addresses, which is wrong. Instead: 1) The fixup offset must be computed from the CPU address, not PCI address. 2) The fixup offset must be computed from the row containing the lowest CPU address, which is not necessarily contained in the first row. 3) The PCI address - the address to which the PCIe controller remaps the address space as seen from the point of view of the PCIe device - must be fixed by the fix offset in the same way as the CPU address only in the special case when the CPU adn PCI addresses are the same. Same addresses means that remapping is disabled, and thus if we change the CPU address, we need also to change the PCI address so that the remapping is still disabled afterwards. Consider an example: The ranges entries contain: PCI address CPU address 70000000 EA000000 E9000000 E9000000 EB000000 EB000000 By default CPU PCIe window is at: E8000000 - F0000000 Consider the case when TF-A moves it to: F2000000 - FA000000 Until now the function would take the PCI address of the first entry: 70000000, and the new base, F2000000, to compute the fix offset: F2000000 - 70000000 = 82000000, and then add 8200000 to all addresses, resulting in PCI address CPU address F2000000 6C000000 6B000000 6B000000 6D000000 6D000000 which is complete nonsense - none of the CPU addresses is in the requested window. Now it will take the lowest CPU address, which is in second row, E9000000, and compute the fix offset F2000000 - E9000000 = 09000000, and then add it to all CPU addresses and those PCI addresses which equal to their corresponding CPU addresses, resulting in PCI address CPU address 70000000 F3000000 F2000000 F2000000 F4000000 F4000000 where all of the CPU addresses are in the needed window. Fixes: 4a82fca8e330 ("arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04Convert CONFIG_CHIP_SELECTS_PER_CTRL to KconfigTom Rini3-2/+6
This converts the following to Kconfig: CONFIG_CHIP_SELECTS_PER_CTRL Cc: Alison Wang <alison.wang@nxp.com> Cc: Pramod Kumar <pramod.kumar_1@nxp.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-04Convert CONFIG_BOARD_POSTCLK_INIT to KconfigTom Rini2-0/+3
This converts the following to Kconfig: CONFIG_BOARD_POSTCLK_INIT Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-04Convert CONFIG_BOARD_ECC_SUPPORT to KconfigTom Rini1-0/+5
This converts the following to Kconfig: CONFIG_BOARD_ECC_SUPPORT Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-04Convert CONFIG_BOARD_COMMON to KconfigTom Rini1-0/+4
This converts the following to Kconfig: CONFIG_BOARD_COMMON Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-04arm: exynos: Move BL1/2 SPI flash defines to their user, drop CONFIGTom Rini1-0/+30
These particular values are not configurable and today we always set CONFIG_SECURE_BL1_ONLY. Move these to where they're used in the code, and drop from the CONFIG namespace. Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2022-03-04Convert CONFIG_BTB to KconfigTom Rini1-0/+10
This converts the following to Kconfig: CONFIG_BTB Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-04powerpc: Remove unused MPC8540/60ADS codeTom Rini12-1733/+0
Remove some code, primarily CPM2 related, that is now unused since the removal of MPC8540/60ADS. Fixes 3913191c8a6b ("powerpc: mpc8540ads: mpc8560ads: Drop support for MPC8540/60ADS") Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-03Merge tag 'u-boot-at91-fixes-2022.04-a' of ↵Tom Rini1-6/+19
https://source.denx.de/u-boot/custodians/u-boot-at91 First set of u-boot-atmel fixes for the 2022.04 cycle: This fixes set includes only a single fix for the Ethernet on sama7g5ek board which is broken at the moment.
2022-03-03Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini1-119/+9
Update and fixes for sl28, lx2, pblimage generation for some powerpc products
2022-03-03sunxi: f1c100s: Fix FEL registers restoreAndre Przywara1-2/+2
Commit 88998f777531 ("arm: arm926ej-s: Add sunxi code") introduced the ARM926 version of the code to save and restore some FEL state, to be able to return to the BROM FEL code after the SPL has run. However during review a change was made, that happened to mess up the register restore part, so SCTLR and CPSR ended up with the wrong values, breaking return to FEL. Use the same offset that we actually save those registers to, to make FEL booting actually work on the Lichee Pi Nano. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-03-03mach-sunxi: Enable SPI boot for SUNIV and licheepi nanoJesse Taube1-1/+1
Enable SPI boot in SPL on SUNIV architecture and use it in the licheepi nano that uses the F1C100s. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-03-03mach-sunxi: Add SPL SPI boot for SUNIVJesse Taube2-7/+18
The SUNIV SoCs come with a sun6i-style SPI controller at the base address of sun4i SPI controller. The module clock of the SPI controller is missing which leaves us running directly from the AHB clock, which is set to 200MHz. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [Icenowy: Original implementation] Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> [Jesse: adaptation to Upstream U-Boot] Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-03-03mach-sunxi: Add boot device detection for SUNIV/F1C100sJesse Taube2-27/+46
In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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