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path: root/board/freescale/mpc8544ds
AgeCommit message (Expand)AuthorFilesLines
2014-09-14kconfig: remove redundant "string" type in arch and board KconfigsMasahiro Yamada1-3/+0
2014-07-30Add board MAINTAINERS filesMasahiro Yamada1-0/+6
2014-07-30kconfig: add board Kconfig and defconfig filesMasahiro Yamada1-0/+15
2013-11-25Driver/DDR: Moving Freescale DDR driver to a common driverYork Sun2-3/+3
2013-11-01board: powerpc: convert makefiles to Kbuild styleMasahiro Yamada1-24/+4
2013-10-17powerpc: Fix CamelCase warnings in DDR related codePriyanka Jain1-1/+1
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk4-68/+4
2012-07-29doc: cleanup - move board READMEs into respective board directoriesWolfgang Denk1-0/+122
2012-02-28net: phy: make board_phy_config responsible for calling drv->configTroy Kisky1-0/+2
2011-10-16punt unused clean/distclean targetsMike Frysinger1-6/+0
2011-04-21tsec: Convert tsec to use PHY LibAndy Fleming1-0/+30
2011-04-04powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from boardKumar Gala1-22/+0
2011-04-04powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()Kumar Gala1-5/+0
2011-01-14powerpc/85xx: Rework MPC8544DS pci_init_board to use common FSL PCIe codeKumar Gala2-83/+26
2011-01-14mpc85xx boards: initdram() cleanup/bugfixBecky Bruce1-17/+0
2011-01-14powerpc/85xx: Cleanup SGMII detection and reportingKumar Gala1-11/+9
2011-01-14powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configuredKumar Gala1-3/+4
2010-11-17Switch from archive libraries to partial linkingSebastien Carlier1-2/+2
2010-11-15mpc85xx: Fix SERDES/eTSEC message indentationPeter Tyser1-2/+2
2010-11-15fsl: Clean up printing of PCI boot infoPeter Tyser1-12/+12
2010-10-19Makefile: move all Power Architecture boards into boards.cfgWolfgang Denk1-28/+0
2010-10-19Rename TEXT_BASE into CONFIG_SYS_TEXT_BASEWolfgang Denk1-2/+2
2010-07-20powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliasesKumar Gala1-13/+2
2010-07-1683xx/85xx/86xx: LBC register cleanupBecky Bruce1-1/+1
2010-04-07fsl: improve the PIXIS code and fix a few bugsTimur Tabi1-1/+0
2010-01-18PCIe, USB: Replace 'end point' references with 'endpoint'Peter Tyser1-3/+3
2010-01-05ppc/85xx: Clean up MPC8544 DS PCI setup codeKumar Gala1-179/+70
2009-09-24ppc/85xx: Clean up use of LAWAR definesKumar Gala1-3/+3
2009-09-08ppc/8xxx: Refactor code to determine if PCI is enabled & agent/hostKumar Gala1-7/+7
2009-08-2985xx: Move to a common linker scriptKumar Gala1-143/+0
2009-08-2985xx: Remove redudant PLATFORM_CPPFLAGSKumar Gala1-4/+0
2009-08-29pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_initKumar Gala1-12/+0
2009-08-29pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_initKumar Gala1-9/+4
2009-07-2285xx/86xx: Replace in8/out8 with in_8/out_8 on FSL boardsKumar Gala1-5/+6
2009-07-2285xx: Report which "bank" of NOR flash we are booting from on FSL boardsKumar Gala1-4/+12
2009-04-04fsl_pci: Move prototypes into fsl_pci.h and remove explicit externsKumar Gala1-6/+0
2009-04-04fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.hKumar Gala1-1/+1
2009-03-21Fix all linker script to handle all rodata sectionsTrent Piepho1-3/+1
2009-02-17Fixup SGMII PHY ids in the device treeAndy Fleming1-0/+3
2009-01-24fsl-ddr: use the 1T timing as default configurationDave Liu1-0/+3
2009-01-2485xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boardsKumar Gala1-3/+3
2009-01-2485xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boardsKumar Gala1-4/+4
2009-01-2485xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boardsKumar Gala1-13/+13
2009-01-14Change PCIE1&2 deciide logic on MPC8544DS board more readableRoy Zang1-2/+2
2009-01-14Fix IO port selection issue on MPC8544DS and MPC8572DS boardsRoy Zang1-1/+1
2008-12-0485xx: remove the unused ddr_enable_ecc in the board fileDave Liu1-10/+0
2008-11-02Coding Style cleanup, update CHANGELOGWolfgang Denk1-1/+1
2008-10-2585xx: Convert all fsl_pci_init users to new APIsKumar Gala1-73/+36
2008-10-18Pass dimm parameters to populate populate controller optionsHaiying Wang1-1/+4
2008-10-18rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD3-80/+80
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