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path: root/board/freescale/mpc8641hpcn/ddr.c
AgeCommit message (Expand)AuthorFilesLines
2009-01-24fsl-ddr: use the 1T timing as default configurationDave Liu1-0/+2
2008-11-02Coding Style cleanup, update CHANGELOGWolfgang Denk1-8/+8
2008-10-18Add DDR options setting on MPC8641HPCN boardHaiying Wang1-36/+110
2008-10-18Pass dimm parameters to populate populate controller optionsHaiying Wang1-1/+4
2008-08-27FSL DDR: Convert MPC8641HPCN to new DDR code.Kumar Gala1-0/+88