| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2023-07-12 | riscv: Rename SiFive CLINT to RISC-V ALINT | Bin Meng | 1 | -1/+1 |
| 2022-10-31 | Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE | Simon Glass | 1 | -1/+1 |
| 2021-07-07 | riscv: dts: add OpenPiton RISC-V board dts support | Tianrui Wei | 1 | -1/+2 |
| 2021-07-06 | board: riscv: add openpiton-riscv64 SoC support | Tianrui Wei | 4 | -0/+86 |
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index : starfive-tech/u-boot.git | |
| StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |