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2023-06-09fwu: DeveloperBox: add support for FWUJassi Brar3-0/+46
Add code to support FWU_MULTI_BANK_UPDATE. The platform does not have gpt-partition storage for Banks and MetaData, rather it used SPI-NOR backed mtd regions for the purpose. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-08efi_loader: add the number of image entries in efi_capsule_update_infoMasahisa Kojima1-1/+1
The number of image array entries global variable is required to support EFI capsule update. This information is exposed as a num_image_type_guids variable, but this information should be included in the efi_capsule_update_info structure. This commit adds the num_images member in the efi_capsule_update_info structure. All board files supporting EFI capsule update are updated. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-02-10Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORTSimon Glass1-1/+1
This converts 13 usages of this option to the non-SPL form, since there is no SPL_EFI_HAVE_CAPSULE_SUPPORT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-07board: developerbox: move mem_map setup laterJassi Brar1-23/+34
dram_init() can't modify global/static variables, so move the mem_map setup later when bss is available. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-07board: developerbox: use identity mapping for >4GBJassi Brar1-1/+1
Identity-map the second and later memory banks which are located >4GB. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-05board: synquacer: developerbox: Remove Masami from MAINTAINERSMasami Hiramatsu1-1/+0
Remove Masami Hiramatsu from MAINTAINERS since he will leave Linaro and his email will be not available anymore. Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2022-04-15capsule: board: Add information needed for capsule updatesSughosh Ganu1-0/+33
Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2021-11-18Revert "board: synquacer: developerbox: Don't set gd->env_addr to ↵Masami Hiramatsu1-0/+2
default_environment" Without default setting of gd->env_addr, U-Boot will cause a synchronous abort if the env-variables on the SPI flash is broken or not saved corectly. Set gd->env_addr correctly. This reverts commit 535870f3b0fb09ee9b2885409f05304111464643. Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Reviewed-by: Marek Behún <marek.behun@nic.cz>
2021-10-31board: synquacer: developerbox: Don't set gd->env_addr to default_environmentMarek Behún1-2/+0
This board sets gd->env_addr to default_environment in board_init(), but the board has environment in SPI flash according to defconfig. Let the env API handle environment automatically. Signed-off-by: Marek Behún <marek.behun@nic.cz> Cc: Masami Hiramatsu <masami.hiramatsu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-14pci: Drop DM_PCISimon Glass1-1/+0
This option has not effect now. Drop it, using PCI instead where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-24board: synquacer: Initialize SCBM SMMU at board_init()Masami Hiramatsu1-0/+15
Since the SCBM SMMU is not only connected to the NETSEC but also shared with the F_SDH30 (eMMC controller), that should be initialized at board level instead of NETSEC. Move the SMMU initialization code into board support and call it from board_init(). Without this fix, if the NETSEC is disabled, the Linux eMMC ADMA cause an error because SMMU is not initialized. Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-07-06board: synquacer: Add DeveloperBox 96boards EE supportMasami Hiramatsu4-0/+205
Add the DeveloperBox 96boards EE support. This board is also known as Socionext SynQuacer E-Series. It contians one "SC2A11" SoC, which has 24-cores of arm Cortex-A53, and 4 DDR3 slots, 3 PCIe slots (1 4x port and 2 1x ports which are expanded via PCIe bridge chip), 2 USB 3.0 ports and 2 USB 2.0 ports, 2 SATA ports and 1 GbE, 64MB NOR flash and 8GB eMMC on standard MicroATX Form Factor. For more information, see this page; https://www.96boards.org/product/developerbox/ Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>