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2021-07-26mmc: zynq_sdhci: Split set_tapdelay function to in and outAshok Reddy Soma1-35/+38
Split arasan_zynqmp_set_tapdelay() to handle input and output tapdelays separately. This is required to handle zero values for ITAP and OTAP values. If we dont split, we will have to remove the if() in the function, which makes ITAP values to be overwritten when OTAP values are called to set and vice-versa. Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6 bits for OTAP for ZynqMP. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-01xilinx: zynqmp: Add support for 67dr siliconT Karthik Reddy1-0/+5
Add zynqmp 67dr silicon to zynqmp device id table. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23zynqmp: Do not place u-boot to reserved memory locationMichal Simek1-0/+21
TF-A and SecureOS can allocate the part of DDR for self but U-Boot is not handling this configuration that the part of memory is reserved and shouldn't be used by U-Boot. That's why read all reserved memory locations and don't use it. The code was taken from commit 4a1b975dac02 ("board: stm32mp1: reserve memory for OP-TEE in device tree") and commit 1419e5b5167e ("stm32mp: update MMU config before the relocation") which is used by stm32 and does the job properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Handle MMC seq number based on boot deviceMichal Simek1-0/+35
K26 has EMMC and SD and default 0 is not working when system is booting out of SD which is controller 1. Add controller autodetection via mmc_get_env_dev(). The same code is used for distro_boot selection done in board_late_init(). bootseq variable can't be reused because this is called so late. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Add psu_init_gpl for k26 boardsMichal Simek2-0/+674
Add psu_init_gpl file for getting SPL to work directly from the tree. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Add support for SVD devicesMichal Simek1-1/+27
SVDs are using different name which can't be handled via zynqmp_devices structure. That's why introduce zynqmp_detect_svd_name() which checks ID code for these devices and show proper name for them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-11arm64: zynqmp: Writing correct value to ANALOG_BUSAdrian Fiergolski1-0/+11
The default register configuration after powerup for PSSYSMON_ANALOG_BUS register is incorrect. Hence, fix this in SPL by writing correct fixed value. It follows UG1085 chapter 'PS SYSMON Analog_Bus' and reflects commit sw_apps:zynq ("056ca65d44549ce27f716d423e8dfdefeee7440c") in Xilinx:embeddedsw[1]. [1] https://github.com/Xilinx/embeddedsw Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23xilinx: zynqmp: Add usb dfu/thor distro boot supportT Karthik Reddy1-1/+1
In usb boot mode distro boot should select usb device as primary boot device instead of usb host. So make usb dfu as primary boot device. But do not list it in boot_targets as fallback option because it is not classic mode for booting. Using 60s timeout by default should be enough time for dfu-utils to start transaction. In case none needs this please change timeout value in the command or disable CONFIG_DFU_TIMEOUT. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-31Merge tag 'xilinx-for-v2021.07' of ↵Tom Rini3-82/+3910
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.07 net: - Fix gem PCS support spi: - Small trivial fixes zynq: - Enable time/timer commands - Update bitmain platform - Several DT changes zynqmp: - Update clock driver - mini config alignments - Add/update psu_init for zcu208/zcu216/zc1275 - Several DT changes - Enable efi debug command (also for Versal)
2021-03-30arm64: zynqmp: Update psu_init for zcu1275Michal Simek1-82/+148
Update clock/pll setup, ddr, MIOs based on 2020.2 hw design. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30arm64: zynqmp: Add missing psu inits for zcu208/216Michal Simek2-0/+3762
Add missing configurations file for zcu208 and zcu216. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-02reset: Remove addr parameter from reset_cpu()Harald Seiler1-1/+1
Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-28Correct U-Boot upstream repositoryHeinrich Schuchardt1-1/+1
The U-Boot source moves to https://source.denx.de/u-boot/u-boot.git effective 2021-02-28. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-23Merge tag 'xilinx-for-v2021.04-rc3' of ↵Tom Rini3-5/+2
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
2021-02-23arm64: zynqmp: Rename zc1275/zcu1275 to be aligned with DT nameMichal Simek2-0/+0
Folder names corresponds to DT name. These boards have been renamed from zc1275 to zcu1275 by commit shown below and this should be the part of that commit. Fixes: 420d44678119 ("arm64: zynqmp: Rename zc1275 to zcu1275") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23arm64: zynqmp: Do not clear reset reasonMichal Simek1-5/+1
There is no need to clear reset reason register because it is protected by PMUFW already which is reported when verbose log is enabled as: pm_core.c@733 APU> No write permission to 0xFF5E0220 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-10xilinx: Show silicon version in SPLMichal Simek1-0/+1
Both Zynq and ZynqMP can show silicon versions in SPL boot flow. It is useful to be aware. The patch is also fixing possition of these bits on ZynqMP. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass1-0/+1
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-20xilinx: zynqmp: Save bootseq number for SD/EMMC boot modesMichal Simek1-0/+1
For systems which has both sdhci controllers enable it is worth to export bootseq number for variables. Then the variable can be used in custom scripts to tune logic for OS. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-06Merge tag 'xilinx-for-v2021.04' of ↵Tom Rini1-0/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.04 arm64: - DT updates microblaze: - Add support for NOR device support spi: - Fix unaligned data write issue nand: - Minor code change xilinx: - Fru fix in limit calculation - Fill git repo link for all Xilinx boards video: - Add support for seps525 spi display tools: - Minor Vitis file support cmd/common - Minor code indentation fixes serial: - Uartlite debug uart initialization fix
2021-01-05xilinx: Fill git repository for Xilinx boardsMichal Simek1-0/+1
All Xilinx SoCs have repository location filled already but boards are covered by different fragment which is missing this link. The patch is extending description with adding proper link to the same repository. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-12-19dm: Avoid accessing seq directlySimon Glass1-6/+6
At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29mmc: zynq_sdhci: Add common function to set input/output tapdelaysAshok Reddy Soma1-157/+33
Remove setting tapdelays for different speeds separately. Instead use the ITAP and OTAP delay values which are read from the device tree. If the DT does not contain tap delay values, the predefined values will be used for the same. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-27mmc: Define timing macro'sAshok Reddy Soma1-9/+1
Define timing macro's for all the available speeds of mmc. This is done similar to linux. Replace speed macro's used with these new timing macro's wherever applicable. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-27xilinx: zynqmp: Use tab for macro indentationMichal Simek1-6/+6
Trivial fix. Fixes: fa793165daf7 ("xilinx: zynqmp: refactor silicon name function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: zynqmp: Do not check 0 as invalid return from snprintfMichal Simek1-1/+1
U-Boot SPL on ZynqMP is using CONFIG_SPL_USE_TINY_PRINTF which doesn't return any return value and all the time returns 0. That's why even correct snprintf was returning in SPL chip ID as "unknown". Change checking condition and allow snprintf to return 0 which is according manual patch successful return. "If an output error is encountered, a negative value is returned." Fixes: 43a138956f7e ("arm64: zynqmp: Get rid of simple_itoa and replace it by snprintf") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: zynqmp: Fix debug message in zynqmp_get_silicon_idcode_name()Michal Simek1-1/+1
Fix hex format from 0x%0X to 0x%0x to show correct numbers. Fixes: fa793165daf7 ("xilinx: zynqmp: refactor silicon name function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: zynqmp: Check return value from xilinx_pm_request()Michal Simek1-1/+5
xilinx_pm_request() can failed that's why also check return value. Fixes: 050f10f103cd ("xilinx: zynqmp: remove chip_id function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: cmd: Add support for FRU commandsSiva Durga Prasad Paladugu1-0/+1
This patch adds support for fru commands "fru capture" and "fru display". The fru capture parses the FRU table present at an address and stores in a structure for later use. The fru display prints the content of captured structured in a readable format. As of now, it supports only common header and board area of FRU. Also, it supports only English language code and ASCII8/BINARY formats. fru_data variable is placed to data section because fru parser can be called very early before bss is initialized. And also information needs to be shared that's why it is exported via header. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: common: Add Makefile to common folderMichal Simek1-1/+0
There is no need to reference files in common folder back. Simply adding Makefile to this folder does the job because this "common" location is already wired in main Makefile. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: board: Read the whole eeprom not just offsetMichal Simek1-0/+3
Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Add support for saving sha3 key to different addressMichal Simek1-7/+18
By default 48B sha3 hash value is written to srcaddr which is not the best solution in case of that you want to use data for other operations. That's why add key_addr optional parameters which enables to write 48B sha3 hash value to specified address. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
2020-10-27arm64: zynqmp: Add support for SHA3 commandT Karthik Reddy1-0/+63
This patch adds support for SHA3 command. It takes data blob as input and generates 48 bytes sha3 hash value. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Add support for RSA commandT Karthik Reddy1-0/+72
This patch adds support for RSA command, performs RSA encrypt & RSA decrypt on data blob of key size. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Add support for encryption and decryption on data blobSiva Durga Prasad Paladugu1-1/+81
This patch adds support for encryption and decryption on a given data blob using different key sources such as userkey(KUP), device key and PUF key. Inorder to support this a new zynqmp command(zynqmp aes) has been introduced. Command: zynqmp aes srcaddr ivaddr len aesop keysrc dstaddr [keyaddr]\n" Encrypts or decrypts blob of data at src address and puts it\n" back to dstaddr using key and iv at keyaddr and ivaddr\n" respectively. keysrc values specifies from which source key\n" has to be used, it can be User/Device/PUF key. A value of 0\n" for KUP(user key),1 for DeviceKey and 2 for PUF key. The\n" aesop value would specify the operationwhich can be 0 for\n" decrypt and 1 for encrypt(1) operation\n"; Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Get rid of simple_itoa and replace it by snprintfMichal Simek1-2/+5
simple_itoa() is implemented only for !CONFIG_USE_TINY_PRINTF. Tiny printf is normally used by SPL that's code which uses simple_itoa() has missing reference. That's why refactor code by using on snprintf() instead of strncpy()/strncat() combination. This change also descrease code size by saving 24B based on buildman. aarch64: (for 1/1 boards) all -22.0 rodata +2.0 text -24.0 xilinx_zynqmp_virt: all -22 rodata +2 text -24 u-boot: add: 0/0, grow: 0/-1 bytes: 0/-24 (-24) function old new delta board_init 520 496 -24 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Add missing support for 9cg versionMichal Simek1-1/+1
9cg version was supported before code refactoring. The patch is adding it back. Fixes: fa793165daf7 ("xilinx: zynqmp: refactor silicon name function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-24Merge tag 'xilinx-for-v2021.01' of ↵Tom Rini1-184/+202
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.01 arm64: - Support for bigger U-Boot images compiled with PIE microblaze: - Extend support for LE/BE systems zynqmp: - Refactor silicon ID detection code with using firmware interface - Add support for saving variables based on bootmode zynqmp-r5: - Fix MPU mapping and defconfig setting. xilinx: - Minor driver changes: names alignment - Enable UBIFS - Minor DT and macros fixes - Fix boot with appended DT - Fix distro boot cmd: - pxe: Add fixing for platforms with manual relocation support clk: - fixed_rate: Add DM flag to support early boot on r5 fpga: - zynqmppl: Use only firmware interface and enable SPL build serial: - uartlite: Enable for ARM systems and support endians mmc: - zynq: Fix indentation net: - gem: Support for multiple phys - emac: Fix 64bit support and enable it for arm64 kconfig: - Setup default values for Xilinx platforms - Fix dependecies for Xilinx drivers - Source board Kconfig only when platform is enabled - Fix FPGA Kconfig entry with SPL - Change some defconfig values bindings: - Add binding doc for vsc8531
2020-09-23fpga: kconfig: Rename SPL_FPGA_SUPPORT to SPL_FPGAMichal Simek1-7/+2
The patch does sed 's/SPL_FPGA_SUPPORT/SPL_FPGA/g' but also fixing Makefile and zynqmp.c to simplify if/endif logic in zynqmp.c. This change is mostly done to be able to use CONFIG_IS_ENABLED macro and obj-$(CONFIG_$(SPL_)FPGA) in Makefile. For them symbols need to be in sync. And removing one line from Topic Miami boards which is not needed because symbol is not enabled via Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-23xilinx: zynqmp: Add support for saving variablesMichal Simek1-0/+35
Enabling saving variables to MMC(FAT), NAND, SPI based on primary bootmode. Maybe that logic can be tuned for more complicated use cases and better tested for different bootmodes. Tested on zcu104 to SD(FAT) and JTAG(NOWHERE). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23xilinx: zynqmp: Get zynqmp_get_bootmode() out of CONFIG_BOARD_LATE_INITMichal Simek1-18/+18
This function will be also used by different code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23xilinx: zynqmp: Remove one static variableMichal Simek1-3/+3
There is no reason to have name variable saved in BSS section when it doesn't need to be really used. That's why remove static from variable definition and use strdup() to duplicate string with exact size from malloc area instead. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23xilinx: zynqmp: Add missing 43/46/47dr ID codesMichal Simek1-0/+15
Add support for 43/46/47dr devices. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23xilinx: zynqmp: refactor silicon name functionIbai Erkiaga1-165/+138
Current algorithm used to get the silicon name is bit complicated and hard to follow. Updated to use more straightforward mechanism based on the Device ID code table (Table 1-2). The full IDCODE register is used (except device revision bits [31:28]) to get the device name and IDCODE2 value is used for identifying the variant. Additionally to make the algorithm bit more clear it also save some space as the devices table is slightly bit smaller. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-26CONFIG_NR_DRAM_BANKS: Remove unreferenced code as its always definedStefan Roese1-2/+0
Since commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") & commit 999a772d9f24 ("Kconfig: Migrate CONFIG_NR_DRAM_BANKS"), CONFIG_NR_DRAM_BANKS is always defined with a value (4 is default). It makes no sense to still carry code that is guarded with "#ifndef CONFIG_NR_DRAM_BANKS" (and similar). This patch removes all these unreferenced code paths. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-20xilinx: Add support for ENV_VARS_UBOOT_RUNTIME_CONFIGMichal Simek1-0/+3
Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG to enable/disable updating variables with run time information. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20xilinx: zynqmp: remove chip_id functionIbai Erkiaga1-37/+20
Remove chip_id function and integrate the firmware call in the zynqmp_get_silicon_idcode_name function. The change avoids querying the firmware twice and makes the code bit more clear. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20xilinx: zynqmp: get chip ID at EL3Ibai Erkiaga1-6/+4
Modify the board init function to allow getting the chip ID when U-Boot proper is executed at EL3. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20xilinx: zynqmp: get chip ID using firmware driverIbai Erkiaga1-52/+27
Current implementation for getting chip ID uses either raw access on EL3 or a SMC call to get the silicon information. Following change simplifies the code using always the firmware driver. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20arm64: zynqmp: Fix set_fdtfile() not to break u-boots DTBIgor Lantsman1-6/+13
Origin function was calling strsep which replaced delimiter ',' by a null byte ('\0'). Operation was done directly on FDT which ends up with the following behavior: ZynqMP> printenv fdtfile fdtfile=xilinx/zynqmp.dtb ZynqMP> fdt addr $fdtcontroladdr ZynqMP> fdt print / compatible compatible = "xlnx", "zynqmp" As is visible fdtfile was correctly composed but a null byte caused that xlnx was separated from zynqmp. This hasn't been spotted because in all Xilinx DTs there are at least 3 compatible string and only the first one was affected by this issue. But for systems which only had one compatible string "xlnx,zynqmp" it was causing an issue when U-Boot's DT was used by Linux kernel. The patch removes strsep calling and strchr is called instead which just locate the first char after deliminator ',' (variable called "name"). And using this pointer in fdtfile composing. Fixes: 91d7e0c47f51 ("arm64: zynqmp: Create fdtfile from compatible string") Reported-by: Igor Lantsman <igor.lantsman@opsys-tech.com> Signed-off-by: Igor Lantsman <igor.lantsman@opsys-tech.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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