summaryrefslogtreecommitdiff
path: root/board
AgeCommit message (Collapse)AuthorFilesLines
2023-07-26board: m68k add missing maintainerAngelo Dureghello6-6/+6
Add myself as a maintainer for orphaned boards. All these boards are covered by buildman m68k test. Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-07-25MAINTAINERS: Take maintainership of TI KeyStone2 supportAndrew Davis1-10/+7
Add arch/arm/mach-keystone/ into K2 board directory MAINTAINERS file. Convert current entries into regex match style. Assign maintainership to myself. Signed-off-by: Andrew Davis <afd@ti.com>
2023-07-25MAINTAINERS: Add some missing directories or filesTom Rini13-5/+14
In a few cases we have MAINTAINERS entries that are missing obvious paths or files. Typically this means a board directory that did not list itself, but in a few cases we have a Kconfig file or similar. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25MAINTAINERS: Deal with '+' in pathsTom Rini3-3/+5
The listed paths are allowed to contain wildcards. This includes the '+' character which we have as a literal part of the path in a few cases. Escape the '+' here so that files are matched. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25MAINTAINERS: Fix path typos and similarTom Rini19-23/+23
We have a number of cases where the in-tree path of files and where they presumably were when the first version of a patch were posted differ slightly. Correct these to point at where the files are now. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25MAINTAINERS: Add a number of "common" directoriesTom Rini42-0/+47
A number of platforms have "common" directories that are in turn not listed by the board MAINTAINERS file. Add these directories in many cases. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25xes: Remove leftover codeTom Rini5-184/+0
The platforms here have been removed, but the common code directory was forgotten. Clean up. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25arm: Remove leftover MAINTAINERS filesTom Rini4-31/+0
These platforms have been removed, but the MAINTAINERS file was missed, clean up. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25arm: Remove more remnants of bcmcygnusTom Rini2-91/+0
Remove some leftover files from the bcmcygnus platform. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25sunxi: Add MAINTAINERS entry for Lctech Pi F1C200sTom Rini1-0/+5
This defconfig was added without a MAINTAINERS entry, add one. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25rockchip: Add MAINTAINERS entry for Radxa Rock 4C+Tom Rini1-0/+6
This defconfig was added without a MAINTAINERS entry, add one. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25MAINTAINERS: Add some missing defconfig files to existing entriesTom Rini6-1/+8
We have a few places where defconfigs were added (or renamed) and not included in their previously listed MAINTAINERS entry, correct this. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Adam Ford <aford173@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25MAINTAINERS: Correct minor mistakes on some file listingsTom Rini3-3/+3
There are a few entries where minor mistakes mean that we don't match up with obviously expected files, correct those. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-22board: ti: keys: add .key and .crt for fit signature signingManorit Chawdhry2-0/+84
Fit signature mechanism through the standards require the presence of .key and .crt in the folder with the same name, since we are using our custMpk only for the signing, update the format to that of standards to be compatible for packaging easily. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-22environment: ti: Make get_fdt_mmc commonAndrew Davis6-6/+0
Since get_fdt_mmc is common, factor it out into mmc.env and remove it from each platform env file along with changing the directory path to reflect the standards. Use it in mmcloados but keep loadfdt defined in case it is still used by some external uEnv.txt script. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-22environment: ti: Prefix ARM64 DTB names with directoryAndrew Davis6-12/+12
In Linux the ARM64 DTSs are stored in vendor directories to help organize the files and prevent naming collisions. The deployed DTBs will mirror this and so the vendor prefix should be added to the variable used to locate these files. Suggested-by: Ryan Eatmon <reatmon@ti.com> Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-22board: ti: am64x: am64x.env: set fdtfile env variableKamlesh Gurudasani1-0/+1
Set fdtfile env variable similar to other k3 socs. Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-22doc: board: ti: Update documentation for binman flowNeha Malcom Francis1-350/+0
Earlier documentation specified builds for generating bootloader images using an external TI repository k3-image-gen and core-secdev-k3. Modify this to using the binman flow so that user understands how to build the final boot images. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.imgNeha Malcom Francis1-0/+2
Support added for HS-SE, HS-FS and GP boot binaries for AM62ax. HS-SE: * tiboot3-am62ax-hs-evm.bin * tispl.bin * u-boot.img HS-FS: * tiboot3-am62ax-hs-fs-evm.bin * tispl.bin * u-boot.img GP: * tiboot3.bin --> tiboot3-am62ax-gp-evm.bin * tispl.bin_unsigned * u-boot.img_unsigned It is to be noted that the bootflow followed by AM62ax requires: tiboot3.bin: * R5 SPL * R5 SPL dtbs * TIFS * board-cfg * pm-cfg * sec-cfg * rm-cfg tispl.bin: * DM * ATF * OP-TEE * A72 SPL * A72 SPL dtbs u-boot.img: * A72 U-Boot * A72 U-Boot dtbs Reviewed-by: Simon Glass <sjg@chromium.org> [afd@ti.com: changed output binary names appropriately] Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22am62a: yaml: Add board configs for AM62axNeha Malcom Francis5-0/+2589
Added YAML configs for AM62ax Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.imgNeha Malcom Francis1-0/+2
Support added for HS-SE, HS-FS and GP boot binaries for AM62. HS-SE: * tiboot3-am62x-hs-evm.bin * tispl.bin * u-boot.img HS-FS: * tiboot3-am62x-hs-fs-evm.bin * tispl.bin * u-boot.img GP: * tiboot3.bin --> tiboot3-am62x-gp-evm.bin * tispl.bin_unsigned * u-boot.img_unsigned It is to be noted that the bootflow followed by AM62 requires: tiboot3.bin: * R5 SPL * R5 SPL dtbs * TIFS * board-cfg * pm-cfg * sec-cfg * rm-cfg tispl.bin: * DM * ATF * OP-TEE * A72 SPL * A72 SPL dtbs u-boot.img: * A72 U-Boot * A72 U-Boot dtbs Reviewed-by: Simon Glass <sjg@chromium.org> [afd@ti.com: changed output binary names appropriately] Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22am62: yaml: Add board configs for AM62Neha Malcom Francis4-0/+1515
Added YAML configs for AM62 Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.imgNeha Malcom Francis1-0/+2
Support has been added for both HS-SE, HS-FS and GP images. HS-SE: * tiboot3-j721s2-hs-evm.bin * tispl.bin * u-boot.img HS-FS: * tiboot3-j721s2-hs-fs-evm.bin * tispl.bin * u-boot.img GP: * tiboot3.bin --> tiboot3-j721s2-gp-evm.bin * tispl.bin_unsigned * u-boot.img_unsigned It is to be noted that the bootflow followed by J721S2 requires: tiboot3.bin: * R5 SPL * R5 SPL dtbs * TIFS * board-cfg * pm-cfg * sec-cfg * rm-cfg tispl.bin: * DM * ATF * OP-TEE * A72 SPL * A72 SPL dtbs u-boot.img: * A72 U-Boot * A72 U-Boot dtbs Reviewed-by: Simon Glass <sjg@chromium.org> [afd@ti.com: changed output binary names appropriately] Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22j721s2: yaml: Add board configs for J721S2Neha Malcom Francis4-0/+3328
Added YAML configs for J721S2 Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.imgNeha Malcom Francis1-0/+2
Support added for HS and GP boot binaries for AM64x. HS-SE: * tiboot3-am64x_sr2-hs-evm.bin * tispl.bin * u-boot.img HS-FS: * tiboot3-am64x_sr2-hs-fs-evm.bin * tispl.bin * u-boot.img GP: * tiboot3.bin --> tiboot3-am64x-gp-evm.bin * tispl.bin_unsigned * u-boot.img_unsigned Note that the bootflow followed by AM64x requires: tiboot3.bin: * R5 SPL * R5 SPL dtbs * sysfw * board-cfg * pm-cfg * sec-cfg * rm-cfg tispl.bin: * ATF * OP-TEE * A53 SPL * A53 SPL dtbs u-boot.img: * A53 U-Boot * A53 U-Boot dtbs Reviewed-by: Simon Glass <sjg@chromium.org> [afd@ti.com: changed output binary names appropriately] Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22am64x: yaml: Add board configs for AM64xNeha Malcom Francis4-0/+1828
Added YAML configs for AM64xx Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22am65: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.imgNeha Malcom Francis1-0/+2
Support has been added for both HS-SE(SR 2.0) and GP(SR 2.0) images. HS-SE: * tiboot3-am65x_sr2-hs-evm.bin * sysfw-am65x_sr2-hs-evm.itb * tispl.bin * u-boot.img GP: * tiboot3.bin --> tiboot3-am65x_sr2-gp-evm.bin * sysfw.itb --> sysfw-am65x_sr2-gp-evm.itb * tispl.bin_unsigned * u-boot.img_unsigned Note that the bootflow followed by AM65x requires: tiboot3.bin: * R5 SPL * R5 SPL dtbs sysfw.itb: * sysfw * board-cfg * pm-cfg * sec-cfg * rm-cfg tispl.bin: * ATF * OP-TEE * A53 SPL * A53 SPL dtbs u-boot.img: * A53 U-Boot * A53 U-Boot dtbs Reviewed-by: Simon Glass <sjg@chromium.org> [afd@ti.com: changed output binary names appropriately] Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22am65x: yaml: Add AM65x board config filesNeha Malcom Francis4-0/+2495
Added YAML configs for AM65x Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.imgNeha Malcom Francis1-0/+2
Support has been added for both HS-SE(SR 2.0), HS-FS(SR 2.0) and GP images. HS-SE: * tiboot3-j7200_sr2-hs-evm.bin * tispl.bin * u-boot.img HS-FS: * tiboot3-j7200_sr2-hs-fs-evm.bin * tispl.bin * u-boot.img GP: * tiboot3.bin --> tiboot3-j7200-gp-evm.bin * tispl.bin_unsigned * u-boot.img_unsigned It is to be noted that the bootflow followed by J7200 requires: tiboot3.bin: * R5 SPL * R5 SPL dtbs * TIFS * board-cfg * pm-cfg * sec-cfg * rm-cfg tispl.bin: * DM * ATF * OP-TEE * A72 SPL * A72 SPL dtbs u-boot.img: * A72 U-Boot * A72 U-Boot dtbs Reviewed-by: Simon Glass <sjg@chromium.org> [afd@ti.com: changed output binary names appropriately] Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22j7200: yaml: Add J7200 board config filesNeha Malcom Francis4-0/+2493
Added YAML configs for J7200 Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.imgNeha Malcom Francis1-0/+2
By providing entries in the binman node of the device tree, binman will be able to find and package board config artifacts generated by TIBoardConfig with sysfw.bin and generate the final image sysfw.itb. It will also pick out the R5 SPL and sign it with the help of TI signing entry and generate the final tiboot3.bin. Entries for A72 build have been added to k3-j721e-binman.dtsi to generate tispl.bin and u-boot.img. Support has been added for both HS-SE(SR 1.1), HS-FS(SR 2.0) and GP images In HS-SE, the encrypted system firmware binary must be signed along with the signed certificate binary. HS-SE: * tiboot3-j721e_sr1_1-hs-evm.bin * sysfw-j721e_sr1_1-hs-evm.itb * tispl.bin * u-boot.img HS-FS: * tiboot3-j721e_sr2-hs-fs-evm.bin * sysfw-j721e_sr2-hs-fs-evm.itb * tispl.bin * u-boot.img GP: * tiboot3.bin -->tiboot3-j721e-gp-evm.bin * sysfw.itb --> sysfw-j721e-gp-evm.itb * tispl.bin_unsigned * u-boot.img_unsigned It is to be noted that the bootflow followed by J721E requires: tiboot3.bin: * R5 SPL * R5 SPL dtbs sysfw.itb: * TIFS * board-cfg * pm-cfg * sec-cfg * rm-cfg tispl.bin: * DM * ATF * OP-TEE * A72 SPL * A72 SPL dtbs u-boot.img: * A72 U-Boot * A72 U-Boot dtbs Reviewed-by: Simon Glass <sjg@chromium.org> [afd@ti.com: changed output binary names appropriately] Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22j721e: schema: yaml: Add general schema and J721E board config filesNeha Malcom Francis5-0/+4038
Schema file in YAML must be provided in board/ti/common for validating input config files and packaging system firmware. The schema includes entries for rm-cfg, board-cfg, pm-cfg and sec-cfg. Board config files must be provided in board/ti/<devicename> in YAML. These can then be consumed for generation of binaries to package system firmware. Added YAML configs for J721E in particular. Signed-off-by: Tarun Sahu <t-sahu@ti.com> [n-francis@ti.com: prepared patch for upstreaming] Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-22binman: ti-secure: Add support for TI signingNeha Malcom Francis2-0/+61
The ti-secure entry contains certificate for binaries that will be loaded or booted by system firmware whereas the ti-secure-rom entry contains certificate for binaries that will be booted by ROM. Support for both these types of certificates is necessary for booting of K3 devices. Reviewed-by: Simon Glass <sjg@chromium.org> [vigneshr@ti.com: fixed inconsist cert generation by multiple packing] Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21board: ti: am62x: evm: Update function calls for splash screenNikhil M Jain1-26/+15
Use spl_dcache_enable, in place of setup_dram, arch_reserve_mmu to set up pagetable, initialise DRAM and enable Dcache to avoid multiple function calls. Check for CONFIG_SPL_VIDEO in place of CONFIG_SPL_VIDEO_TIDSS to prevent any build failure in case video config is not defined and video related functions are called. Check for CONFIG_SPL_SPLASH_SCREEN and CONFIG_SPL_BMP before calling splash_display to avoid compilation failure. Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-21board: ti: am62x: evm: Include necessary header filesNikhil M Jain1-0/+1
At the time of compilation evm.c gives below warning for implicit declaration of enable_caches, to mitigate this include cpu_func.h. board/ti/am62x/evm.c: In function ‘spl_board_init’: board/ti/am62x/evm.c:90:9: warning: implicit declaration of function ‘enable_caches’ [-Wimplicit-function-declaration] 90 | enable_caches(); Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-21arm64: zynqmp: Switch to amd.com emailsMichal Simek10-10/+10
Update my and DPs email address to match current setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com
2023-07-21arm64: versal-net: spi: Update boot sequence dynamicallyAshok Reddy Soma1-3/+21
Currently xspi0 is used for all spi boot modes, it means it will use "sf probe 0 0 0" for all spi's irrespective of which node it is wired. Get boot sequence from dev_seq() and update boot command for xspi dynamically. As a result bootcmd for spi is updated as below when two instances of spi are present in DT node. bootcmd_xspi0=devnum_xspi=0; run xspi_boot bootcmd_xspi1=devnum_xspi=1; run xspi_boot xspi_boot=sf probe $devnum_xspi:0 0 0 && sf read $scriptaddr $script_offset_f $script_size_f && echo XSPI: Trying to boot script at ${scriptaddr} && source ${scriptaddr}; echo XSPI: SCRIPT FAILED: continuing...; Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230614093058.30438-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21xilinx: zynq: Add the missing function prototypesAlgapally Santosh Sagar1-0/+2
Add the missing prototypes for the functions pointed by the below sparse warnings warning: no previous prototype for 'set_dfu_alt_info' [-Wmissing-prototypes] warning: no previous prototype for 'board_debug_uart_init' [-Wmissing-prototypes] Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230614090359.10809-7-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21arm: zynq: Pass the missing argument type in function definitionAlgapally Santosh Sagar4-8/+8
Pass missing argument type in the function definition to fix the sparse warning, warning: old-style function definition [-Wold-style-definition] Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230614090359.10809-6-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-19Merge tag 'fsl-qoriq-2023-7-13' of ↵Tom Rini4-2/+46
https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq Enable DM_SERIAL for T2080RDB, T4240RDB, T1042D4RDB, T1024RDB
2023-07-17sandbox: Install ACPI tables on startupSimon Glass1-0/+16
With x86 we set up the ACPI tables on startup so they can be examined. Do the same with sandbox, so it is consistent. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17sandbox: Correct header order in board fileSimon Glass1-3/+3
Fix the header order in this file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17bios_emulator: Add Kconfig and adjust Makefile for SPLSimon Glass1-7/+0
The Kconfig for this is currently inside a particular board. Move it into the correct place and allow use in SPL, so that video can be used there if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-14arch: arm: npcm8xx: add cpu version and 4G ram supportJim Liu1-3/+67
Add npcm8xx A2 cpu version check and add 4G RAM support Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-07-14board: nuvoton: arbel: change uboot load addressJim Liu1-2/+2
use new memory layout and change uboot load address. open tpm, tee and more config feature No need to reserve top memory because the reserved space is moved to the bottom area of memory. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-07-14board: nuvoton: add env setting for boot to linuxJim Liu1-0/+7
add console and mem env to boot to linux kernel Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-07-14Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini4-1/+27
- mvebu: Thecus: Misc enhancement and cleanup (Tony) - mvebu: Add AC5X Allied Telesis x240 board support incl NAND controller enhancements for this SoC (Chris)
2023-07-14Merge tag 'u-boot-imx-20230713' of ↵Tom Rini35-872/+1780
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20230713 ------------------- Merge for 2023.10. CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16888
2023-07-13arm: mvebu: Add Allied Telesis x240 boardChris Packham3-0/+26
The x240 and SE240 are a series of L2+ switches from Allied Telesis. There are a number of them in the range but as far as U-Boot is concerned all the CPU block components are the same so there's only one board defined. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2023-07-13mx7dsabresd: Retrieve the second MAC address from fusesFabio Estevam1-0/+6
Currently, a random MAC address is assigned to eth1 in Linux. Fix this behavor by retrieving the second MAC address from the fuses. Signed-off-by: Fabio Estevam <festevam@denx.de>
generated by cgit v1.2.3 (git 2.39.0) at 2024-10-09 08:07:32 +0300