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2017-12-19Merge git://git.denx.de/u-boot-rockchipTom Rini3-18/+90
2017-12-19Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini6-31/+90
2017-12-18Merge tag 'xilinx-for-v2018.01-rc2-v2' of ↵Tom Rini1-4/+19
git://www.denx.de/git/u-boot-microblaze Xilinx changes for v2018.01-rc2-v2 fpga: - Enable loading bitstream via fit image for !xilinx platforms zynq: - Fix SPL SD boot mode zynqmp: - Not not reset in panic - Do not use simple allocator because of fat changes - Various dt chagnes - modeboot variable setup - Fix fpga loading on automotive devices - Fix coverity issues test: - Fix env test for !hush case - Stephen's patch
2017-12-18rockchip: evb-rk3399: update document for board bring upKever Yang1-18/+65
Since we support ATF in SPL and add script for it, let's make the document up to date. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-18arm64: zynqmp: Access timestamp_ref_ctrl register only if running in el3Siva Durga Prasad Paladugu1-1/+4
Access the timestamp ref ctrl register only if runinng at el3 level otherwise just return. This change fixes the issue when CRL APB is marked as secure and accessing when not in el3 causes exception. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-18rockchip: move CONFIG_ENV_SIZE and CONFIG_ENV_OFFSET to KconfigKlaus Goger1-0/+6
This commit adds ENV_SIZE and ENV_OFFSET configuration items for ARCH_ROCKCHIP, but keeps these non-visible (i.e. not prompt is given). With these new items present, the configuration from the header files is moved to Kconfig. Keeping these non-visible is necessary to have the possibility to select new default values if CONFIG_IS_IN_* is changed (interactively or with oldconfig). Otherwise it will always be set to a previous value if used with a prompt. As an example if we do a defconfig with CONFIG_IS_IN_MMC and change it to CONFIG_IS_IN_SPI_FLASH via menuconfig, ENV_SIZE and ENV_OFFSET will not be changed to the correct values as defconfig will already have set them to the default values of CONFIG_IS_IN_MMC in .config. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-17rockchip: rk3399-puma: set gpio4cd iodomain to 1.8VJakob Unterwurzacher1-0/+19
The PCIe reset signal is connected to GPIO4_C6 on the Puma module. This pin is supplied by 1.8V, but the default iodomain setting is 3.0V and in this situation the pin is unable to go high. Linux assumes that this signal works in early boot as PCIe is probed before loading the iodomain driver. Make PCIe work in Linux by setting the gpio4cd iodomain to 1.8V. Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-15armv8: ls1012ardb: support hwconfig for eSDHC1 enablingYangbo Lu1-20/+35
I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-15armv8: ls1012ardb: add more board version informationYangbo Lu1-3/+23
Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-15armv8: ls1012ardb: clean up definitions for I2C IO expandersYangbo Lu1-7/+7
This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-15board/ls2080a, ls1088a: Add check for mc-dpl applied in fdtYogesh Gaur4-4/+4
Function fdt_fixup_board_enet() performs fdt fixup. Only return fdt_status_okay() when both MC is applied and DPL is deployed, else return fdt_status_fail(). This check is added to LS1088A/LS2080A/LS2088A boards. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-14arm64: zynqmp: Add support for zynqmp automotive siliconsMichal Simek1-2/+2
Remove silicon prefix. Automotive grade devices are using xazu instead of xczu prefix. The patch "fpga: xilinx: Check for substring in device ID validation" (sha1: f72132673a01216e760864e442f168977cce2bd2) enables this functionality for zynq devices that only substrings are checked. Unfortunately there is no way how to detect device grade that's why this change is reasonable. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14arm64: zynqmp: Setup modeboot variable based on bootmodeMichal Simek1-0/+8
Setup bootmode variable based on bootmode selection. This is helping with setting up boot method. Also setup sdbootdevice. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14arm64: zynqmp: Read boot mode register using zynqmp_mmio_readSiva Durga Prasad Paladugu1-1/+5
Dont read boot mode register directly read it using zynqmp_mmio_read(). Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-shTom Rini8-0/+303
2017-12-14Merge git://git.denx.de/u-boot-samsungTom Rini2-9/+22
2017-12-14armv8: ls1088ardb: support force SDHC mode by hwconfigYangbo Lu2-0/+24
The BRDCFG5[SPISDHC] register field of Qixis device is used to control SPI and SDHC signal routing. 10 = Force SDHC Mode - SPI_CS[0] is routed to CPLD for SDHC_VS use. - SPI_CS[1] is unused. - SPI_CS[2:3] are routed to the TDMRiser slot. 11 = Force eMMC Mode - SPI_CS[0:3] are routed to the eMMC card. 0X = Auto Mode - If SDHC_CS_B=0 (SDHC card installed): Use SDHC mode described above. - Else SDHC_CS_B=1 (no SDHC card installed): Use eMMC mode described above. In default the hardware uses auto mode, but sometimes we need to use force SDHC mode to support SD card hotplug, or SD sleep waking up in kernel. This patch is to support force SDHC mode by hwconfig. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-13ARM: omap3_logic: Enable NAND unlocking during Falcon modeAdam Ford2-0/+84
Falcon mode was already working with SD card. This enables the unlocking of NAND to allow the NAND read & write. This also expands the README file based on the am335x describing how to setup Falcon mode. Signed-off-by: Adam Ford <aford173@gmail.com>
2017-12-13ARM: omap3_logic: Unlock NAND automatically in U-BootAdam Ford1-0/+14
The Micron Flash is locked by default. This will automaticlly unlock so manually unlocking is unnecessary in U-Boot. Signed-off-by: Adam Ford <aford173@gmail.com>
2017-12-11ARC: HSDK: Fixup DW SDIO CIU frequency to 50000000HzEugeniy Paltsev1-1/+11
DW SDIO controller has external CIU clock divider controlled via register in the SDIO IP. Due to its unexpected default value (we expected it to divide by 1 but in reality it divides by 8) SDIO IP uses wrong CIU clock (it should be 100000000Hz but actual is 12500000Hz) and works unstable (see STAR 9001204800). So increase SDIO CIU frequency from actual 12500000Hz to 50000000Hz by switching from the default divisor value (div-by-8) to the minimum possible value of the divisor (div-by-2) in HSDK platform code. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-09ARM: rmobile: Add R8A77995 D3 Draak boardMarek Vasut4-0/+163
Add bits to support yet another board, the R8A77995 D3 Draak. The DT file is from Linux 4.15-rc1 , commit b35334447513c14a4dd55a67c269a743d4a4824b . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09ARM: rmobile: Add R8A77970 V3M Eagle boardMarek Vasut4-0/+140
Add bits to support yet another board, the R8A77970 V3M Eagle. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-08Merge git://git.denx.de/u-boot-mpc85xxTom Rini22-29/+29
2017-12-08rockchip: rk3399-puma: preserve leading zeros in serial#Jakob Unterwurzacher1-1/+1
Linux preserves leading zeros in /proc/cpuinfo, so we should as well. Otherwise we have the situation that /sys/firmware/devicetree/base/serial-number and /proc/cpuinfo disagree in Linux. Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-07armv8: LS1088A_QSPI: Add secure boot defconfigs for QSPI boot.Udit Agarwal1-0/+12
Add the secure boot defconfigs for QSPI boot on LS1088ARDB and LS1088AQDS platforms. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-07armv8: LS1088A_QSPI: SECURE_BOOT: Images validationUdit Agarwal2-3/+5
Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC phase using esbc_validate command. Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment Add header address for PPA to be validated during ESBC phase for LS1088A platform based on LAyerscape Chasis 3. Moves sec_init prior to ppa_init as for validation of PPA sec must be initialised before the PPA is initialised. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-07armv8: ls1088: Add fsl_fdt_fixup_flashAshish Kumar1-0/+29
IFC-NOR and QSPI-NOR signals are muxed on SoC to save pins Add fsl_fdt_fixup_flash() to disable IFC-NOR node in dts if QSPI is enabled and vice-versa Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-07powerpc: mpc85xx: Fix static TLB table for SDRAMYork Sun22-29/+29
Most predefined TLB tables don't have memory coherence bit set for SDRAM. This wasn't an issue before invalidate_dcache_range() function was enabled. Without the coherence bit, dcache invalidation doesn't automatically flush the cache. The coherence bit is already set when dynamic TLB table is used. For some boards with different SPL boot method, or with legacy fixed setting, this bit needs to be set in TLB files. Signed-off-by: York Sun <york.sun@nxp.com>
2017-12-05ARM: Samsung: Add Exynos5422-based Odroid HC1 supportMarek Szyprowski2-9/+22
Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI, no eMMC, no build-in USB3.0 hub, no extension port pins, and no GPIO button. USB3.0 ports are used for build-in JMicron USB to SATA bridge and Gigabit R8152 ethernet chips. HC1 uses only passive cooling. This patch also updates Odroid's ADCmax array and reduces ADC tolerance to 1% to ensure that XU4 and HC1 revisions are properly detected. I've tested this with XU3, XU3-lite, XU4 and HC1 boards. In case of my test boards I got following values from ADC register: 372, 370, 1281 and 1313. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Tested-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2017-12-04Merge git://git.denx.de/u-boot-uniphierTom Rini10-10/+10
2017-12-04ARM: arch-meson: build memory banks using reported memory from registersNeil Armstrong4-0/+32
As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware and a secondary BL32 firmware. Since mid-2017, the reserved memory address of the BL31 firmware was moved and grown for security reasons. But mainline U-Boot and Linux has the old address and size fixed. These SoCs have a register interface to get the two firmware reserved memory start and sizes. This patch adds a dynamic reservation of the memory zones in the device tree bootmem reserved memory zone used by the kernel in early boot. To be complete, the memory zones are also added to the EFI reserved zones. Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2]. [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html [2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005410.html Changes since v1: - switched the #if to if(IS_ENABLED()) to compile all code paths - renamed function to meson_board_add_reserved_memory() - added a mem.h header with comment - updated all boards ft_board_setup() Changes since RFC v2: - reduced preprocessor load - kept Odroid-C2 static memory mapping as exception Changes since RFC v1: - switch to fdt rsv mem table and efi reserve memory - replaced in_le32 by readl() Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [trini: Fix warning on khadas-vim over missing <asm/arch/mem.h> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-12-04arm: Add Khadas VIM support based on Meson GXL familyNeil Armstrong5-0/+171
This adds platform code for the Khadas VIM board based on a Meson GXL (S905X) SoC with the Meson GXL configuration. This initial submission supports UART, MMC/SDCard and Ethernet with the Internal RMII PHY. The meson-gxl-s905x-khadas-vim.dts is synchronised from the linux 4.13 stable tree as of 4.13.8. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04arm: Add LibreTech CC support based on Meson GXL familyNeil Armstrong5-0/+175
This adds platform code for the Libre Computer CC "Le Potato" board based on a Meson GXL (S905X) SoC with the Meson GXL configuration. This initial submission supports UART, MMC/SDCard and Ethernet with the Internal RMII PHY. The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13 stable tree as of 4.13.8. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04board: p212: use common ethernet init functionNeil Armstrong1-12/+2
Switch P212 Ethernet init to the common Ethernet init function. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04board: odroid-c2: use common ethernet init functionNeil Armstrong1-9/+2
Switch Odroid-C2 Ethernet init to the common Ethernet init function. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04add support for Raspberry Pi Zero WDmitry Korunov1-0/+5
Signed-off-by: Dmitry Korunov <dessel.k@gmail.com>
2017-12-04mtd: nand: Rename nand.h into rawnand.hMasahiro Yamada10-10/+10
This header was renamed to rawnand.h in Linux. The following is the corresponding commit in Linux. commit d4092d76a4a4e57b65910899948a83cc8646c5a5 Author: Boris Brezillon <boris.brezillon@free-electrons.com> Date: Fri Aug 4 17:29:10 2017 +0200 mtd: nand: Rename nand.h into rawnand.h We are planning to share more code between different NAND based devices (SPI NAND, OneNAND and raw NANDs), but before doing that we need to move the existing include/linux/mtd/nand.h file into include/linux/mtd/rawnand.h so we can later create a nand.h header containing all common structure and function prototypes. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-01rockchip: rk3399-puma: add code to allow forcing a power-on resetPhilipp Tomsich1-0/+44
The reset circuitry in the RK3399 only resets 'almost all logic' when a software reset is performed. To make our software maintenance easier in the future, we want to have the option (controlled by a DTS property) to force all reset causes other than a power-on reset to trigger a power-on reset via a GPIO trigger. This adds the necessary support to the rk3399-puma (i.e. RK3399-Q7) board-support and the documentation for the new property (sysreset-gpio) within the /config-node. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-12-01rockchip: rk3399-puma: implement usb_hub_reset_devices for puma-rk3399Philipp Tomsich1-1/+69
For some versions of the RK3399-Q7 (at least revisions v1.1 and v1.2 are affected), we need to turn on the power for the port connected to the on-module USB hub only when the device is probed for the first time to ensure that the hub does not enter a low-power mode (that U-Boot's USB stack can't deal with). Note that this is needed for U-Boot only, as Linux eventually manages to attach the hub even when it has entered into its low-power state (when the hub wakes up the next time) after a few seconds. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
2017-12-01rockchip: board: evb-rk3128: add empty MakefilePhilipp Tomsich2-0/+5
Even if the board-specific directory Makefile doesn't have any targets, it still needs to exist. This adds a minimal Makefile for the board/rockchip/evb_rk3128 directory and a evk-rk3128.c (as built-in.o needs to be built for every directory that a Makefile gets run for). Fixes: c7a6866 ("rockchip: rk3128: add evb-rk3128 support") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-01rockchip: rk3128: add evb-rk3128 supportKever Yang2-0/+21
evb-rk3128 is an evb from Rockchip based on rk3128 SoC: - 2 USB2.0 Host port; - 1 HDMI port; - 2 10/100M eth port; - 2GB ddr; - 16GB eMMC; - UART to USB debug port; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-01rockchip: board: evb_rv1108: update READMEAndy Yan1-3/+2
After commit d962e5dadc2c("rockchip: mkimage: use spl_boot0 for all Rockchip SoCs"), the mkimage will not pad the Tag memroy, so we shoud pass a Taged ddr.bin/spl.bin to it. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-shTom Rini5-159/+137
2017-11-30Merge git://git.denx.de/u-boot-marvellTom Rini5-6/+6
2017-11-30ARM: rmobile: Rework the ULCB CPLD driverMarek Vasut1-94/+118
Rework the ULCB CPLD driver and make it into a sysreset driver, since that is what the ULCB CPLD driver is mostly for. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30arm: mvebu: correct comments around cas_wl/cas_lChris Packham5-6/+6
The order of members in struct hws_topology_map is cas_wl, cas_l. The comments in the original db-88f6820-gp.c had this wrong and have been copied to other Armada-385 based boards. Practically this hasn't made a difference since all these boards set both cas_wl and cas_l to 0 (autodetect) but if there were ever a board that did need to set these explicitly they would run into unexpected issued. Update the comments to reflect the correct order of structure members. Reported-by: Tobi Wulff <tobi.wulff@alliedtelesis.co.nz> Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2017-11-30board: laird: add WB50N CPU moduleBen Whitten4-0/+230
This board is based on the Atmel sama5d3 eval boards. Supporting the following features: - Boot from NAND Flash - Ethernet - FIT - SPL Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com> Signed-off-by: Dan Kephart <dan.kephart@lairdtech.com>
2017-11-30board: laird: add WB45N CPU moduleBen Whitten4-0/+223
This board is based on the Atmel 9x5 eval board. Supporting the following features: - Boot from NAND Flash - Ethernet - FIT - SPL Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com> Signed-off-by: Dan Kephart <dan.kephart@lairdtech.com>
2017-11-30board: atmel: add sama5d2_ptc_ek boardLudovic Desroches7-303/+149
Add the SAMA5D2 PTC EK board and remove the SAMA5D2 PTC ENGI board which was a prototype. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-11-30mach-stm32: Factorize MPU's region config for STM32 SoCsPatrice Chotard1-0/+2
MPU's region setup can be factorized between STM32F4/F7/H7 SoCs family and used a common MPU's region config. Only one exception for STM32H7 which doesn't have device area located at 0xA000 0000. For STM32F4, configure_clocks() need to be moved from arch_cpu_init() to board_early_init_f(). Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
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