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path: root/configs/LicheePi_Zero_defconfig
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2017-10-17configs: Resync with savedefconfigTom Rini1-2/+2
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-11cmd: Toggle the default value of CONFIG_CMD_IMLSTuomas Tynkkynen1-1/+0
Having this as a 'default y' is rather annoying because it doesn't actually compile unless other options are defined in the board header: ../cmd/bootm.c: In function 'do_imls_nor': ../cmd/bootm.c:330:7: error: 'CONFIG_SYS_MAX_FLASH_BANKS' undeclared (first use in this function); did you mean 'CONFIG_SYS_MAX_FLASH_SECT'? i < CONFIG_SYS_MAX_FLASH_BANKS; ++i, ++info) { Make it 'default n' so people who develop new boards that start from a blank defconfig have one less compilation failure to debug. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2017-10-03sunxi: defaultly enable SPL for Lichee Pi ZeroIcenowy Zheng1-0/+4
As we have already DRAM initialization code for V3s SoC, we can defaultly enable SPL now on Lichee Pi Zero. Add CONFIG_SPL in Lichee Pi Zero defconfig. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-09-01configs: Migrate all of the existing USB symbols, except fastbootTom Rini1-0/+1
This syncs all of the currently Kconfig'd symbols out of the headers and into the defconfig files. This has two exceptions, first am335x_evm needs to be converted to DM in SPL and then it can stop undef'ing CONFIG_DM_USB. Leaving this as-is results in a build failure, and without work, run time failure. The other case is am43xx_evm.h and in turn am43xx_evm_usbhost_boot. The problem here is that we need DWC3 USB host mode in SPL, but still desire to have gadget mode in U-Boot proper. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-01configs: Re-syncTom Rini1-2/+0
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-21sunxi: add support for Lichee Pi ZeroIcenowy Zheng1-0/+12
Lichee Pi Zero is a development board with a V3s SoC, which features 64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not soldered in production batch), a 40-pin RGB LCD connector and some extra pins available as 2.54mm pins or stamp holes. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>