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path: root/configs/roc-pc-rk3399_defconfig
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2023-02-17configs: Resync with savedefconfigTom Rini1-4/+4
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-16ram: rockchip: Add common ddr type configsJagan Teki1-1/+1
We have common ddr types in rockchip or in general. So use the common ddr type names instead of per Rockchip SoC to avoid confusion. The respective ddr type names will use on the associated ddr SoC driver as these drivers are built per SoC at a time. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16configs: roc-pc-rk3399: Enable rockchip efuse supportChristopher Obbard1-0/+2
Enable efuse support which allows reading of the cpuid#, serial# and also generates a unique mac address from the board's serial. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-09Merge branch 'next'Tom Rini1-0/+1
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-29configs: Resync with savedefconfigTom Rini1-2/+0
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-21Merge tag 'v2023.01-rc4' into nextTom Rini1-0/+8
Prepare v2023.01-rc4 Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-19configs:rockchip:roc-rk3399-pc:Enable more configsManoj Sai1-0/+8
This patch enables the following: 1) use preboot configuration to enable usb devices. 2) Enable USB configs so keyboards and other USB devices work, update the number of ports of the usb root hub. - with this addition the updated USB device Tree: 1 Hub (12 Mb/s, 0mA) U-Boot Root Hub 1 Hub (12 Mb/s, 0mA) | U-Boot Root Hub | +-2 Hub (12 Mb/s, 100mA) USB 2.0 Hub [MTT] 1 Hub (5 Gb/s, 0mA) U-Boot XHCI Host Controller 3) enable crypto RNG support. 4) Change SPI speed and frequency: - increase the maximum SPI slave device speed, SPI flash max frequency for the environment from 10Mhz to 30MHz. - performance stats for speed update from 10MHz to 30MHz: with 10Mhz speed update: => sf update 0x300000 0x800000 0x400000 4194304 bytes written, 0 bytes skipped in 36.819s, speed 119837 B/s with 30Mhz speed update: => sf update 0x300000 0x800000 0x400000 4194304 bytes written, 0 bytes skipped in 20.319s, speed 220752 B/s Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Da Xue <da.xue@libretech.co> Signed-off-by: dsx724 <da@lessconfused.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-06Convert CONFIG_SYS_NS16550_MEM32 et al to KconfigTom Rini1-0/+1
This converts the following to Kconfig: CONFIG_SPL_NS16550_MIN_FUNCTIONS CONFIG_SYS_NS16550_MEM32 CONFIG_SYS_NS16550_PORT_MAPPED CONFIG_SYS_NS16550_REG_SIZE CONFIG_SYS_NS16550_SERIAL To do this we also introduce CONFIG_SPL_SYS_NS16550_SERIAL so that platforms can enable the legacy driver here for SPL. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-10-31Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASESimon Glass1-1/+1
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEOSimon Glass1-1/+1
Now that all the old code is gone, rename this option. Driver model migration is now complete. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-23configs: Resync with savedefconfigTom Rini1-1/+0
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06Convert CONFIG_SPL_BSS_START_ADDR to KconfigTom Rini1-0/+2
This converts the following to Kconfig: CONFIG_SPL_BSS_START_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06Convert CONFIG_SPL_STACK to KconfigTom Rini1-0/+2
This converts the following to Kconfig: CONFIG_SPL_STACK Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.hTom Rini1-0/+2
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR - Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack pointer directly, otherwise we use the common calculation. - On some platforms that were using the standard calculation but did not set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them. - On a small number of platforms that were not subtracting GENERATED_GBL_DATA_SIZE do so now via the standard calculation. - CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most board config header files. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06Convert CONFIG_SPL_BSS_MAX_SIZE et al to KconfigTom Rini1-0/+1
This converts the following to Kconfig: CONFIG_SPL_BSS_MAX_SIZE CONFIG_SPL_MAX_FOOTPRINT Note that the da850evm platforms were violating the "only use one" rule here, and so now hard-code their BSS limit. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06Convert CONFIG_SPL_PAD_TO et al to KconfigTom Rini1-0/+2
This converts the following to Kconfig: CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE CONFIG_TPL_PAD_TO CONFIG_TPL_MAX_SIZE Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the existing places. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-21configs: set CONFIG_COUNTER_FREQUENCYPeng Fan1-0/+1
Set CONFIG_COUNTER_FREQUENCY according to COUNTER_FREQUENCY in config header file. Signed-off-by: Peng Fan <peng.fan@nxp.com> [trini: Re-run migration]
2022-04-08configs: Resync with savedefconfigTom Rini1-1/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-15rockchip: rk33xx: Drop ROCKCHIP_USB2_PHY on boards without itPeter Robinson1-1/+0
The 64 bit rk33xx chips don't have the ROCKCHIP_USB2_PHY IP so drop the configs as they were likely copied over from other boards during enablement. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-09-04spi: Rename SPI_SUPPORT to SPISimon Glass1-1/+1
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-01Convert CONFIG_SKIP_LOWLEVEL_INIT et al to KconfigTom Rini1-0/+1
This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-01Convert CONFIG_SYS_LOAD_ADDR to KconfigTom Rini1-0/+1
Now that we have consistent usage, migrate this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-07-28Rename GPIO_SUPPORT to GPIOSimon Glass1-1/+1
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-27configs: Resync with savedefconfigTom Rini1-1/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-28configs: Resync with savedefconfigTom Rini1-1/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-21rockchip: rk3399-roc-pc: default to SPI bus 1 for SPI-flashHugh Cole-Baker1-0/+1
SPI flash on this board is located on bus 1, default to using bus 1 for SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to bus 0. Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Suggested-by: Simon Glass <sjg@chromium.org> Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob") Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-08-10configs: Resync with savedefconfigTom Rini1-1/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-28configs: Resync with savedefconfigTom Rini1-2/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-22rockchip: roc-rk3399-pc: Set LED only during POR and pwr_key=yJagan Teki1-1/+3
ROC-RK3399-PC has specific set of configurations for on-board led setup. Due to easiness for user to know the state of the board roc-rk339-pc board code will setup the low power led on/off, and waiting for user to press power key and then glow full power led. All this needs to happen only during power-on-reset not for soft reset or WDT. Also, it is not a proper usage to ask the user to press the Power key if the board connected remotely, so add the environment variable 'pwr_key' to check as well. So, user need to press Power key only - during POR - pwr_key=y Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: roc-rk3399-pc: Add custom led_setup()Jagan Teki1-1/+1
roc-rk3399-pc has some specific requirements to support LEDS, environment. board detection and etc prior to U-Boot proper. So as of now SPL would be a better stage for these custom board requirements to support unlike TPL. Adding few of these custom requirements like LEDS in TPL would require extra code pulling and also the size of TPL can grow. So, this patch moves the leds code from TPL into SPL Board init led_setup code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (split tpl.c change as separate patch) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: roc-rk3399-pc: Disable RAM_ROCKCHIP_DEBUGJagan Teki1-0/+1
Disable ram rockchip debug driver for roc-rk3399-pc boards since we have verified ram in many instances with respective U-Boot versions. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: roc-rk3399-pc: Update ENV offset, sizeJagan Teki1-2/+2
Adjust the ENV offset, size to fit into all images on 16MB flash. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: roc-rk3399-pc: Enable USB GadgetJagan Teki1-0/+3
Enable DWC3 core, gadget for roc-rk3399-pc board. This would help to use fastboot by default. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-26spi: Enable missing CONFIG_SPL_DM_SPI supportTom Rini1-0/+1
Due to how the Makefile logic is we currently get DM_SPI support in SPL enabled by having DM_SPI enabled for full U-Boot but not having CONFIG_SPL_DM_SPI set. Add this missing option to boards that were inadvertently making use of it. Cc: Adam Ford <aford173@gmail.com> Cc: Akash Gajjar <akash@openedev.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Andy Yan <andy.yan@rock-chips.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Chee Hong Ang <chee.hong.ang@intel.com> Cc: Chin-Liang See <clsee@altera.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com> Cc: Heiko Schocher <hs@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Klaus Goger <klaus.goger@theobroma-systems.com> Cc: Levin Du <djw@t-chip.com.cn> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Luca Ceresoli <luca@lucaceresoli.net> Cc: Marek Vasut <marex@denx.de> Cc: Michal Simek <monstr@monstr.eu> Cc: Mike Looijmans <mike.looijmans@topic.nl> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Pavel Machek <pavel@denx.de> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: Suniel Mahesh <sunil@amarulasolutions.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Wolfgang Grandegger <wg@aries-embedded.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-07roc-rk3399-pc: Add SPI bootJagan Teki1-0/+3
U-Boot TPL 2020.07-rc3-00090-gd4e919f927-dirty (Jun 01 2020 - 23:45:53) Channel 0: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Channel 1: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB 256B stride 256B stride lpddr4_set_rate: change freq to 400000000 mhz 0, 1 lpddr4_set_rate: change freq to 800000000 mhz 1, 0 Trying to boot from BOOTROM Returning to boot ROM... U-Boot SPL 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530) Trying to boot from MMC1 NOTICE: BL31: v2.2(release): NOTICE: BL31: Built : 15:05:37, May 12 2020 U-Boot 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530) SoC: Rockchip rk3399 Reset cause: POR Model: Firefly ROC-RK3399-PC Board DRAM: 3.9 GiB PMIC: RK808 MMC: mmc@fe320000: 1, sdhci@fe330000: 0 Loading Environment from SPI Flash... SF: Detected w25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Model: Firefly ROC-RK3399-PC Board Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-07roc-rk3399-pc: Mark default env from SPIJagan Teki1-2/+4
Mark the default U-Boot environment as SPI flash since this is an on board flash device. Updated env offset, size in contrast with default since the U-Boot proper has to start from 384K. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-30roc-rk3399-pc: Enable USB3.0 HostJagan Teki1-0/+6
Enable USB3.0 Host support for ROC-RK3399-PC boards. Tested USB3.0 SSD on Type C1 port on board. => usb start starting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus dwc3: usb maximum-speed not found Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 2 USB Device(s) found scanning bus dwc3 for devices... 6 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-2 Hub (480 Mb/s, 100mA) USB 2.0 Hub [MTT] 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Hub (480 Mb/s, 0mA) | | VIA Labs, Inc. USB2.0 Hub | | | +-4 Hub (480 Mb/s, 100mA) | | USB 2.0 Hub | | | +-5 (480 Mb/s, 100mA) | VIA Technologies Inc. USB 2.0 BILLBOARD 0000000000000001 | +-3 Hub (5 Gb/s, 0mA) | VIA Labs, Inc. USB3.0 Hub | +-6 Mass Storage (5 Gb/s, 224mA) JMicron External Disk 3.0 DB12345678A2 => usb reset resetting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus dwc3: usb maximum-speed not found Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 2 USB Device(s) found scanning bus dwc3 for devices... 6 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-28configs: Resync with savedefconfigTom Rini1-5/+3
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-02rockchip: Enable HDMI output on rk3399 board w/ HDMIJagan Teki1-0/+6
Enable config options and console setting to respective rk3399 board for HDMI output. Boards supported and tested on this patch are: - NanoPc T4 - NanoPi M4 - NanoPi Neo4 - ROC-RK3399-PC - Rock960 Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-03-26rockchip: Change keyboard input from CrOS EC keyboard to a USB keyboardPeter Robinson1-0/+1
These boards aren't ChromeOS devices so won't have a cros-ec-keyb input as it's the keyboard available via the ChromeOS Embedded Controller. Update them to use a USB keyboard which would actually be available. Also enable the usb keyboard option for those devices that don't have it enabled already. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-28configs: Resync with savedefconfigTom Rini1-1/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-02-19board: roc-pc-rk3399: Add support for onboard LED's and push button to ↵Suniel Mahesh1-0/+1
indicate power mode Added support for onboard LED's and push button. When powered board will be in low power mode(yellow LED), on button press, board enters full power mode (red LED) and boots u-boot. Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19rockchip: rk3399: split roc-pc-rk3399 out of evb_rk3399Suniel Mahesh1-0/+1
roc-pc-rk3399 board has one user button & three user LED's. Currently we don't have any code support for these devices. Since button and LED's are specific to roc-pc-rk3399 board, split it into its own board file and add code support here. Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-06configs: Resync with savedefconfigTom Rini1-2/+2
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-30rockchip: rk3399: Enable DISPLAY_CPUINFOJagan Teki1-1/+0
RK3288, RK3399 are now support cpu-info, so enable DISPLAY_CPUINFO by default. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30roc-pc-rk3399: Enable SPI FlashJagan Teki1-0/+2
Enable winbond SPI flash for ROC-PC-RK3399 board. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-22configs: Resync with savedefconfigTom Rini1-1/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-21env: Finish migration of common ENV optionsTom Rini1-0/+1
- In ARMv8 NXP Layerscape platforms we also need to make use of CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so. - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define to 0. - Add Kconfig entry for ENV_ADDR. - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it. - Add ENV_xxx_REDUND options that depend on their primary option and SYS_REDUNDAND_ENVIRONMENT - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR for the pre-main-U-Boot environment location. - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but rather it being non-zero, as it will now be zero by default. - Rework the env_offset absolute in env/embedded.o to not use CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within ENV_IS_IN_FLASH. - Migrate all platforms. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: uboot-stm32@st-md-mailman.stormreply.com Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-20env: Add CONFIG_SYS_RELOC_GD_ENV_ADDR symbolTom Rini1-0/+1
Today in initr_reloc_global_data() we use some non-obvious tests to determine if we need to relocate the env_addr within gd or not. In order to facilitate migration of other symbols to Kconfig we need to introduce a new symbol for this particular use case. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-17configs: Rename roc-rk3399-pc -> roc-pc-rk3399 defconfigJagan Teki1-0/+55
roc-rk3399-pc_defconfig is committed in below commit <8a681f4c5aa15db51ad0209734859c9fe7c29cfd> ("rockchip: rk3399: Add ROC-RK3399-PC support") which doesn't follow the existing defconfigs on rk3399. So, rename as followed with other rk3399 defconfigs. Cc: Levin Du <djw@t-chip.com.cn> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-24 21:00:56 +0300