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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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Since we can not set OsIndications from Runtime Services
SetVariables at this moment, it is better to ignore the
OsIndications if there is any capsule file in the
correct place.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
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Since the recent commit;
commit b891ff18f899 ("efi_loader: Force a single FMP instance per hardware store")
forces a single FMP instances for a storage, we can not
enable both RAW and FIT capsule image support at once.
Since RAW capsule image support is simpler than FIT,
enable RAW capsule image instead of FIT by default.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
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Enable UEFI secure boot on synquacer. Note that unless user
setup their keys, the secure boot will not work.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
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Since the U-Boot for the SynQuacer DeveloperBox is designed for
compatible with EDK2 boot, we don't need to support Ext2/4 fs
support by default. Drop it.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
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Since MTD partitions are based on the devicetree name,
remove unneeded mtdparts settings and update DFU setting.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
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Make the U-Boot binary for SynQuacer position independent so
that the previous bootloader (SCP firmware or BL2) can load
the U-Boot anywhere.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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Enable EFI capsule update support. With the EFI capsule update,
you can update U-Boot, TF-A and OP-TEE. TF-A and OP-TEE are
usually combined as a FIP binary, but if the binary is bigger
than 480KB, you have to modify FIP header, split the OP-TEE
and stores the OP-TEE binary in the different place. This
configuration supports both cases.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
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Add the DeveloperBox 96boards EE support. This board is also
known as Socionext SynQuacer E-Series. It contians one "SC2A11"
SoC, which has 24-cores of arm Cortex-A53, and 4 DDR3 slots,
3 PCIe slots (1 4x port and 2 1x ports which are expanded via
PCIe bridge chip), 2 USB 3.0 ports and 2 USB 2.0 ports, 2 SATA
ports and 1 GbE, 64MB NOR flash and 8GB eMMC on standard
MicroATX Form Factor.
For more information, see this page;
https://www.96boards.org/product/developerbox/
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
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