starfive-tech/u-boot.git - StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)

Age	Commit message (Collapse)	Author	Files	Lines
2019-04-30	configs: Resync with savedefconfig	Tom Rini	1	-1/+1
	Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-03-26	Convert CONFIG_SF_DEFAULT_* to Kconfig	Patrick Delaunay	1	-0/+1
	This converts the following to Kconfig: CONFIG_SF_DEFAULT_BUS CONFIG_SF_DEFAULT_CS CONFIG_SF_DEFAULT_MODE CONFIG_SF_DEFAULT_SPEED I use moveconfig script and then manual check on generated u-boot.cfg to solve the remaining issue. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-02-14	ARM: zynq: Convert dlc20 and zc70x board to DM_I2C	Michal Simek	1	-3/+6
	All these board have also eeprom enabled that's why it is also enabled via defconfig. There is also no need to have zc70x specific config file that's why also remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-14	ARM: zynq: Run distribution boot commands first	Michal Simek	1	-1/+0
	This patch is doing two things. 1. Exchanging order of boot commands. distro_bootcmd is run first followed by Xilinx boot command. 2. Remove CONFIG_BOOTCOMMAND from configs (and follow mainline) by creating Xilinx distribution bootcommand and wiring it as the last bootcommand. QSPI, NAND distribution boot command will be added later. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-07	configs: Don't use SPI_FLASH_BAR as default	Vignesh R	1	-1/+0
	Now that new SPI NOR layer uses stateless 4 byte opcodes by default, don't enable SPI_FLASH_BAR. For SPI controllers that cannot support 4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c, renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to not break functionality. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-01-24	ARM: zynq: Convert all boards to OF_SEPARATE	Michal Simek	1	-1/+0
	Build warning was added by: "fdt: Add warning about CONFIG_OF_EMBED" (sha1: 841d5fbae4e993476fa87d8933db0cd58d3c2d41) Zynq mini configurations are not moved yet and it is questionable if make sense to move them too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-08	configs: Resync with savedefconfig	Tom Rini	1	-1/+0
	Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-16	arm: zynq: Add support for DLC20 board	Michal Simek	1	-0/+74
	Xilinx DLC20 has I2C0 with EEPROM(1KB), UART1, GPIO, SD0 (EMMC 4GB), USB0 device, ENET0, QSPI (16MB) and DDR(two of 256MB each). Boards have mix of Winbond/ST QSPIs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>