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2021-09-01arm: mvebu: turris_mox: Enable SATA supportPali Rohár1-0/+6
SATA disks could be connected via mPCIe add-in card with PCIe-SATA controller into Mox-B or Mox-G module. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01arm: mvebu: espressobin: Enable also SATA support via PCIePali Rohár1-0/+2
Espressobin has one on-board SATA port which is connected directly to CPU. More SATA disks can be connected via mPCIe add-in card with PCIe-SATA controller. So enable required SATA AHCI PCIe drivers in defconfig file. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01Merge https://gitlab.denx.de/u-boot/custodians/u-boot-shTom Rini3-0/+27
2021-08-30configs: Resync with savedefconfigTom Rini5-13/+8
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-27Merge tag 'xilinx-for-v2021.10-rc3' of ↵Tom Rini3-3/+17
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.10-rc3 xilinx: - Disable CONFIG_ARCH_FIXUP_FDT_MEMORY - Print information about cpu via soc drivers and enable DISPLAY_CPUINFO - Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT zynq: - Wire single QSPI - Use power-source instead of io-standard properties - Enable nor on zc770-xm012 zynqmp: - Change handling around multi_boot() - Setup offset for u-boot.itb in spi - Generate run time dfu_alt_info for capsule update - Use explicit values for enums (zynqmp_firmware.h) - Enable RTC/SHA1/BUTTON/BUTTON_GPIO command - Disable WDT driver by default - Bind usb/scsi via preboot because of EFI - DT updates/fixes - Add soc driver - Fix SPL SPI boot mode versal: - Add soc driver sdhci: - Update tap delay programming for zynq_sdhci driver cmd: - Fix RTC uclass handling in date command - Update pwm help message - Update reset help message watchdog: - Fix wwdt compilation rtc: - Deal with seq alias in rtc uclass - Add zynqmp RTC driver fdt: - Add kernel-doc for fdt_fixup_memory_banks()
2021-08-26xilinx: zynqmp: Enable stack relocation to DDRMichal Simek1-0/+4
There is no space in OCM for SPL stack because the space in OCM is occupied by TF-A. That's why move relocate stack to DDR to 0x18000000 address and also enable SPL_SIZE_LIMIT not to be more then 0xfffea000 which is default address for TFA. It is good to summarize current DDR usage in SPL flow. 0-0x80000 is used for BSS (CONFIG_SPL_BSS_START_ADDR, CONFIG_SPL_BSS_MAX_SIZE) 0x100000 is used for DTB passing address (CONFIG_XILINX_OF_BOARD_DTB_ADDR) 0x17fffe70 - CONFIG_SPL_STACK_R_ADDR - is used for GD 0x18000000 is used for SPL stack (CONFIG_SPL_STACK_R_ADDR) 0x20000000-0x21000000 is used for SPL malloc area (CONFIG_SYS_SPL_MALLOC_START, CONFIG_SYS_SPL_MALLOC_SIZE) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: zynqmp: Enable gpio-key/button driverMichal Simek1-0/+2
Enable button uclass and also gpio-key driver by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26arm64: zynqmp: Enable sha1sum commandMichal Simek1-0/+1
Enable it for TPM usage. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: Enable config to display cpuinfoT Karthik Reddy2-2/+0
Enable CONFIG_DISPLAY_CPUINFO to display SoC family & revision. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26soc: xilinx: versal: Add soc_xilinx_versal driverT Karthik Reddy1-0/+1
soc_xilinx_versal driver allows identification of family & revision of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL. Probe this driver using platdata U_BOOT_DEVICE structure which is defined at mach-versal/cpu.c. Add this config to xilinx_versal_virt_defconfig & xilinx_versal_mini_ospi_defconfig file to select this driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26soc: xilinx: zynqmp: Add soc_xilinx_zynqmp driverT Karthik Reddy1-0/+1
soc_xilinx_zynqmp driver allows identification of family & revision of zynqmp SoC. This driver is selected by CONFIG_SOC_XILINX_ZYNQMP. Add this config to xilinx_zynqmp_virt_defconfig file. Probe this driver using platdata U_BOOT_DEVICE structure which is specified in mach-zynqmp/cpu.c. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: Disable ARCH_FIXUP_FDT_MEMORYMichal Simek3-0/+3
Based on DT spec you can have one memory node which multiple ranges or multiple nodes. fdt_fixup_memory_banks() is not implemented in a correct way when multiple memory nodes are present because all ranges are put it to the first memory node found. And next memory nodes are kept in DT which ends up in the same range specification in the same DT. Here is what it is happening. Origin DT. memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; memory@800000000 { device_type = "memory"; reg = <0x8 0x00000000 0x0 0x80000000>; }; After fdt_fixup_memory_banks() memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; }; memory@800000000 { device_type = "memory"; reg = <0x8 0x00000000 0x0 0x80000000>; }; As is visible memory@0 node got second range but there is still memory@800000000 node present and 2G range is listed twice. The solution can't be that second node is removed because it can be referenced already that's why it is better for us to disable this option for now. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: zynqmp: Initialize usb and scsi via prebootMichal Simek1-0/+1
Based on thread https://lists.denx.de/pipermail/u-boot/2021-June/451828.html especially "Overall we have a deficiency in the UEFI implementation in that we cannot deal with block devices added or removed after initialization." there is a need to deal with removable media as usb/scsi/sata. That's why bridge this gap in EFI implementation by resetting usb and scsi resets to get all disks before efi_init_obj_list() is called. In our standard boot flow, where we use distro boot, order is fixed as "jtag mmc0 mmc1 qspi0 nand0 usb0 usb1 scsi0 pxe dhcp" with prioritizing boot device added by commit 2882b39d564b ("arm64: zynqmp: Setup the first boot_target at run time"). When device has ESP partition all devices should be detected because then efi_disk_register() in efi_init_obj_list() is called only once. The first such a device is sd/emmc(mmc0/mmc1) and then disks on usb/sata are not handled at all. The commit 6bb577dbb30f ("arm64: zynqmp: Disable EFI_CAPSULE_ON_DISK_EARLY") also pointed out on this issue but detection of removable media wasn't solved that's why do it now via preboot command. I have tested cases without usb and scsi and there is no problem with calling resets without devices itself. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26arm64: zynqmp: Disable WDT_CDNS driver by defaultMichal Simek1-1/+0
Do not enable watchdog driver in default zynqmp configuration. The reason is that not all distributions are handling watchdog properly and then expires and system resets. If someone needs watchdog in their design please enable it by hand. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-25arm: socfpga: Enable Intel N5X device buildSiew Chin Lim3-0/+214
Add defconfig for N5X to support legacy, ATF and VAB boot flow. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-08-24ARM: rmobile: beacon-renesom: Enable QSPI NOR FlashAdam Ford3-0/+27
There is a QSPI NOR flash part on the board. Because this chip isn't yet supported in Linux, but it is supported in U-Boot, and the face that the RPC_SPI compatible names are different in U-Boot and Linux, the device tree updates are confined to -u-boot.dtsi files. In order to use the QSPI, TF-A must leave RPC unlocked by compiling TF-A with RZG_RPC_HYPERFLASH_LOCKED=0. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Biju Bas <biju.das.jz@bp.renesas.com>
2021-08-24arm: socfpga: Move linux_qspi_enable from bootcommand to board_prep_linux ↵Siew Chin Lim2-2/+2
function Move 'linux_qspi_enable' from bootcommand to board_prep_linux function when OS booted from FIT image for Stratix 10 and Agilex. This flow is common for all Intel SOC64 devices. U-Boot will update 'fdt_addr' environment value based on FIT image in board_prep_linux function, and 'linux_qspi_enable' will refer to 'fdt_addr' environment value to retrieve the device tree node. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-08-23Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini21-0/+21
fsl-qoriq: Fixes related to env, spi, usb, crypto, configs, distro-boot for Layerscape Boards like lx2, sl28, ls2088ardb. powerpc: Fixes for t208xrdb revd board and cortina related configs update for T208xRDB, T4240RDB.
2021-08-22bootcount: add a new driver with syscon as backendNandor Han1-0/+1
The driver will use a syscon regmap as backend and supports both 16 and 32 size value. The value will be stored in the CPU's endianness. Signed-off-by: Nandor Han <nandor.han@vaisala.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-18configs: Migrate CORTINA_FW_ADDR and CORTINA_FW_LENGTH to KconfigKuldeep Singh16-0/+16
Use moveconfig.py script to convert below defines to Kconfig and move these entries to defconfigs. CONFIG_CORTINA_FW_ADDR CONFIG_CORTINA_FW_LENGTH Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18lx2160a: Enable CONFIG_SPI_FLASH_MT35XU for lx2160a-rdb/qdsKuldeep Singh5-0/+5
LX2160A-RDB/QDS has micron mt35xu512aba flash which requires flag CONFIG_SPI_FLASH_MT35XU on to probe flash successfully. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-17qemu-riscv64_smode: fix extlinux (define preboot)Dimitri John Ledkov1-0/+2
Commit 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to Kconfig") removed preboot commands in RISC-V targets and broke extlinux support as reported by Fu Wei <wefu@redhat.com>. The patch finishes migration of CONFIG_USE_PREBOOT and CONFIG_REBOOT to Kconfig. Fixes: 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to Kconfig") Reported-By: Fu Wei <wefu@redhat.com> Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Signed-off-by: Dimitri John Ledkov <dimitri.ledkov@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-08-16configs: Resync with savedefconfigTom Rini37-41/+6
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-16test: dm: Add test for ECDSA UCLASS supportAlexandru Gagniuc1-0/+2
This test verifies that ECDSA_UCLASS is implemented, and that ecdsa_verify() works as expected. The definition of "expected" is "does not find a device, and returns -ENODEV". The lack of a hardware-independent ECDSA implementation prevents us from having one in the sandbox, for now. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-08-16ARM: stm32: Set environment sector size to 4k on DHSOMMarek Vasut2-2/+2
The DHSOM SPI NOR is using 4k erase blocks, make use of it and define the default environment sector size to 4k. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16arm: stm32mp: add defconfig for trusted boot with FIPPatrick Delaunay1-0/+158
Add TF-A FIP support for trusted boot on STM32MP15x, when STM32MP15x_STM32IMAGE is not activated. With FIP support the SSBL partition is named "fip" and its size is 4MB, so the ENV partition name in device tree (for SD card or eMMC) or offset in defconfig (CONFIG_ENV_OFFSET / CONFIG_ENV_OFFSET_REDUND) need to be modified. With FIP the TEE MTD partitions are removed because the OP-TEE binray are included in the FIP containers. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16arm: stm32mp: add config for STM32IMAGE supportPatrick Delaunay1-0/+1
By default for trusted boot with TF-A, U-Boot (u-boot-nodtb) is located in FIP container with its device tree and with the secure monitor (provided by TF-A or OP-TEE). The FIP file is loaded by TF-A BL2 and each components is extracted at the final location. This patch add CONFIG_STM32MP15x_STM32IMAGE to request the STM32 image generation for SOC STM32MP15x when FIP container is not used (u-boot.stm32 is loaded by TF-A as done previously to keep the backward compatibility). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-13Merge https://source.denx.de/u-boot/custodians/u-boot-x86Tom Rini1-1/+1
- Enable SeaBIOS support for Crown Bay - Update SeaBIOS build instructions in the x86 doc - Enable CONFIG_SPI_FLASH_SMART_HWCAPS for Crown Bay
2021-08-13x86: crownbay: Enable CONFIG_SPI_FLASH_SMART_HWCAPSBin Meng1-1/+0
Now that the spi-nor fix has been made in u-boot/master via: commit 87e7219f9c6a ("mtd: spi-nor: Respect flash's hwcaps in spi_nor_adjust_hwcaps()") enable CONFIG_SPI_FLASH_SMART_HWCAPS on Intel Crown Bay again. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-13x86: crownbay: Enable SeaBIOS supportBin Meng1-0/+1
Enable SeaBIOS support for any kernel that requires legacy BIOS services. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-12Merge tag 'u-boot-rockchip-20210812' of ↵Tom Rini1-0/+2
https://source.denx.de/u-boot/custodians/u-boot-rockchip - Add Rockchip SFC driver support; - DTS sync from kernel; - emmc hs400 support for rk3399; - Fix for spinore bootdevice and MMC boot order;
2021-08-11Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini1-1/+4
- Convert GoFlex Home Ethernet and SATA to Driver Model (Tony) - mvebu: Automatically detect CONFIG_SYS_TCLK (Pavel) - mvebu: sata_mv: Fix HDD identication during cold start (Tony) - a37xx: pci: Fix handling PIO config error responses (Pavel) - Other minor misc changes and board maintainer updates
2021-08-11Merge tag 'u-boot-amlogic-20210810' of ↵Tom Rini3-1/+13
https://source.denx.de/u-boot/custodians/u-boot-amlogic - odroid-n2: fix fdtfile suffix for n2-plus - sei610 & meson64_android cleanups to prepare android 11 boot support - use Android BCB mechanism for reboot reason instead of HW reboot flag - Switch meson64_android boot flow to use abootimg for A/B, AVB and DTBO support
2021-08-11rockchip: config: evb-rk3399: add hs400 and SDMA supportYifeng Zhao1-0/+2
This enable hs400 and SDMA support for emmc on evb-rk3399. Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11arm: kirkwood: GoFlex Home: Add DM Ethernet, remove IDE, and add DM SATA configsTony Dinh1-1/+4
Add DM_ETH, SATA_MV and associated configs to goflexhome_defconfig. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-10configs: Resync with savedefconfigTom Rini97-199/+154
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-10configs: sei510/610: android bootflow via abootimgGuillaume La Roque2-0/+10
Activate the following Kconfig options: * AVB for Android Verified Boot support * ADTIMG for merging DTBOs * ABOOTIMG for extracting Android boot image Also rework the partitioning tables: - add a misc partition to handle BCB messages - add a dtbo partition to store various DTBOs - add a vbmeta partition for AVB hashes - Merge vendor and system into the "super" partition Note: avb support is disables by default. To activate it: => setenv force_avb 1; => saveenv; Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-08-10board: amlogic: odroid-n2: fix fdtfile suffix for n2-plusChristian Hewitt1-1/+1
The N2+ dtb is meson-g12b-odroid-n2-plus.dtb, not n2_plus, so correct the suffix provided in the board file. Also align the board ident string shown during boot to match. Fixes: 8bc780106c13 ("board: amlogic: odroid: add runtime detection of the N2/N2+/C4/HC4 variants") Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-08-09Merge tag 'u-boot-imx-20210809' of ↵Tom Rini7-6/+129
https://source.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20210809 - new SOC: add support for imx8ulp - Toradex fixes for colibri (vf / imx6 / imx7 / imx8x) - convert to DM for mx28evk - Fixes for Gateworks ventana boards CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/8639
2021-08-09arm: imx: add i.MX8ULP EVK supportPeng Fan1-0/+103
Add i.MX8ULP EVK basic support, support SD/I2C/ENET/LPUART Log as below: I would keep some debug info for now, and after we move to be stable and production launch, we could drop that. U-Boot SPL 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800) Normal Boot upower_init: soc_id=48 upower_init: version:11.11.6 upower_init: start uPower RAM service user_upwr_rdy_callb: soc=b user_upwr_rdy_callb: RAM version:12.6 Turn on switches ok Turn on memories ok Clear DDR retention ok Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F0 frequency. Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F2 frequency. Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F2 frequency. complete De-Skew PLL is locked and ready WDT: Not found! Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 Load image from 0x3a800 by ROM_API NOTICE: BL31: v2.4(release):imx_5.10.35_2.0.0_imx8ulp_er-10-gf37e59b94 NOTICE: BL31: Built : 01:56:58, Jun 29 2021 NOTICE: upower_init: start uPower RAM service NOTICE: user_upwr_rdy_callb: soc=b NOTICE: user_upwr_rdy_callb: RAM version:12.6 U-Boot 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800) CPU: Freescale i.MX8ULP rev1.0 at 744 MHz Reset cause: POR Boot mode: Single boot Model: FSL i.MX8ULP EVK DRAM: 2 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 2 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial@293a0000 Out: serial@293a0000 Err: serial@293a0000 Net: Warning: ethernet@29950000 (eth0) using random MAC address - 96:35:88:62:e0:44 eth0: ethernet@29950000 Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09board: gateworks: venice: add board model to dtTim Harvey1-0/+1
Add the specific board model from EEPROM config to the device-tree to make it easier to access from Linux userspace. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09configs: imx8mm_venice_defconfig: remove unused SPL featuresTim Harvey1-1/+0
remove unused SPL features to shink the size of the SPL which otherwise would no longer fit into IMX8M Mini OCRAM. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09mx28evk: Convert to driver modelFabio Estevam1-4/+14
Make the conversion to driver model as it is mandatory. Successfully tested booting Linux from the SD card. Dropped support for networking and splash screen as these need to be properly converted to DM and tested. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-08-09mx7dsabresd: Select CONFIG_IMX_HABFabio Estevam1-0/+1
Select CONFIG_IMX_HAB so that the "hab_status" command becomes available, which is useful for checking if the chip has been correctly setup to run in secure boot mode. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-08-09board: gateworks: venice: add imx8mm-gw7902 supportTim Harvey1-1/+1
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring: - LPDDR4 DRAM - eMMC FLASH - Gateworks System Controller - LTE CAT M1 modem - USB 2.0 HUB - M.2 Socket with USB2.0, PCIe, and dual-SIM - IMX8M FEC - PCIe based GbE - RS232/RS485/RS422 serial transceiver - GPS - CAN bus - WiFi / Bluetooth - MIPI header (DSI/CSI/GPIO/PWM/I2S) - PMIC Do the following to add support for it: - add dts - add PMIC config Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09imx: ventana: replace hard-coded LED config with dt based configTim Harvey3-0/+9
Use device-tree LED config instead of hard-coded board-specific config. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-08ARM: renesas: Set CONFIG_SYS_TEXT_BASE=0x0 on R-Car Gen3Marek Vasut1-1/+1
Since R-Car Gen3 already enables position independent build, also set CONFIG_SYS_TEXT_BASE=0x0 to finalize the switch. This is possible since 534f0fbd65 ("arm64: Fix relocation of env_addr if POSITION_INDEPENDENT=y") fixed current env_get_char() crash with CONFIG_SYS_TEXT_BASE=0x0 . This change permits us to start U-Boot from any location in DRAM instead of specific TEXT_BASE. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-08-08ARM: rmobile: Remove default bootargsMarek Vasut7-7/+0
The bootargs in all those boards are a copy of initial example bootargs, just remove those as they make little sense in most configurations. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-08-06xilinx: zynqmp: Enable CMD_RTC command with Zynqmp RTC driverMichal Simek1-0/+2
Enable RTC command to be able to check available. And also enable ZynqMP RTC driver to be possible to use by default. Here is the list when both drivers are enabled: ZynqMP> rtc list RTC #0 - rtc_emul RTC #1 - rtc@ffa60000 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06xilinx: zynqmp: Add support for runtime dfu_alt_info setupMichal Simek1-0/+1
The main reason for this to be implemented is capsule update. Two memories are supported and tested which is MMC FAT based and QSPI based. For creating capsule these commands are used: ./tools/mkeficapsule --raw spl/boot.bin --index 1 capsule1.bin ./tools/mkeficapsule --raw u-boot.itb --index 2 capsule2.bin Then transfer to SD card where these commands run: load mmc 0 10000000 capsule1.bin efidebug capsule update -v 10000000 load mmc 0 10000000 capsule2.bin efidebug capsule update -v 10000000 Depends on the boot device used are binaries loaded to qspi or mmc fat partition. Also multiboot register is handled to make sure that the same location(id) is used as image which is upgraded. Two locations are used by purpose for SPL flow. If only boot.bin is used create only one capsule. Signed-off-by: Michal Simek <michal.simek@xilinx.com>