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AgeCommit message (Expand)AuthorFilesLines
2009-09-10ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link addressKumar Gala1-3/+7
2009-09-08ppc/85xx: Clean up do_resetKumar Gala1-16/+9
2009-09-08ppc/85xx/86xx: Bug fix: call to puts in probecpu() moved to checkcpu().Poonam Aggrwal1-0/+4
2009-09-08ppc/85xx/86xx: Device tree fixup for number of coresPoonam Aggrwal1-0/+2
2009-09-08ppc/85xx,86xx: Handling Unknown SOC versionPoonam Aggrwal1-7/+3
2009-09-08ppc/85xx: Cleanup makefile and related optional filesKumar Gala5-18/+19
2009-09-08ppc/85xx: Fix bug in setup_mp codeKumar Gala1-3/+29
2009-09-08ppc/85xx: Add a simple function to search the TLBKumar Gala1-0/+27
2009-09-0885xx: Add support for setting IVORs to fixed offset defaultsKumar Gala4-0/+95
2009-09-08ppc/85xx: Fix up eSDHC controller clock frequency in the device treeDipen Dudhat1-0/+7
2009-09-08ppc/8xxx: Remove ddr_pd_cntl register since it doesn't existKumar Gala1-1/+0
2009-09-08ppc/85xx: Use CONFIG_FSL_ESDHC to enable sdhc clkDipen Dudhat1-1/+1
2009-08-2985xx: Improve MPIC initializationTimur Tabi1-5/+7
2009-08-2985xx: Added single core members of FSL P1xx/P2xx processors seriesPoonam Aggrwal1-1/+3
2009-08-2985xx: Add L2SRAM Register's macro definitionMingkai Hu1-2/+3
2009-08-2985xx: Move to a common linker scriptKumar Gala2-0/+146
2009-08-2985xx: Added P1020 Processor Support.Poonam Aggrwal1-1/+2
2009-08-298xxx: Removed CONFIG_NUM_CPUS from 85xx/86xxPoonam Aggrwal4-17/+39
2009-08-298xxx: Refactored common cpu specific code for 85xx/86xx into one file.Poonam Aggrwal1-69/+1
2009-08-2985xx: Remove redudant PLATFORM_CPPFLAGSKumar Gala1-2/+1
2009-08-23Prepare 2009.08-rc3Wolfgang Denk1-1/+1
2009-08-1585xx: Fix addrmap to include memoryKumar Gala1-6/+22
2009-07-29Update Freescale copyrights to remove "All Rights Reserved"Kumar Gala1-1/+1
2009-07-02fsl_dma: Break out common memory initialization functionPeter Tyser1-25/+1
2009-07-028xxx: Move dma_init() call to common codePeter Tyser2-3/+3
2009-07-02fsl_dma: Move dma function prototypes to common header filePeter Tyser1-4/+0
2009-07-028xxx: Rename dma_xfer() to dmacpy()Peter Tyser1-15/+14
2009-07-028xxx: Break out DMA code to a common filePeter Tyser1-47/+0
2009-06-13fsl/85xx, 86xx: Sync up DMA codePeter Tyser1-4/+4
2009-06-13fsl: Create common fsl_dma.h for 85xx and 86xx cpusPeter Tyser1-14/+17
2009-06-13qe: Pass in uec_info struct through uec_initializeHaiying Wang1-17/+4
2009-06-1385xx: Add QE clk supportHaiying Wang2-1/+18
2009-06-1385xx: Added MPC8535/E identifiersKumar Gala1-0/+2
2009-06-1385xx: Always attempt ethernet device tree fixupKumar Gala1-3/+0
2009-06-1285xx: Use print_size to report amount of memory not mapped by TLBsKumar Gala1-1/+1
2009-06-1085xx: bugfix for reading maximum TLB size on mpc85xxFredrik Arnerup1-1/+1
2009-04-0285xx: Introduce determine_mp_bootpg() helper.Kumar Gala3-23/+16
2009-03-30MPC85xx: Add MPC8569 CPU supportHaiying Wang3-0/+52
2009-03-3085xx: Add support for additional e500mc featuresKumar Gala4-1/+94
2009-03-30fsl-ddr: add the DDR3 SPD infrastructureDave Liu1-2/+4
2009-03-10Fix mpc85xx ddr-gen3 ddr_sdram_cfg.Ed Swarthout1-2/+2
2009-02-19Coding style cleanup, update CHANGELOGWolfgang Denk1-1/+2
2009-02-1785xx: Add eSDHC support for 8536 DSAndy Fleming1-0/+15
2009-02-1732bit BUg fix for DDR2 on 8572Poonam_Aggrwal-b108121-1/+8
2009-02-17mpc85xx: Add support for the P2020Srikanth Srinivasan2-0/+3
2009-02-1785xx: Fix how we map DDR memoryKumar Gala1-47/+27
2009-02-1785xx: Format cpu freq printing to handle 8 coresKumar Gala1-3/+5
2009-01-24Add secondary CPUs processor frequency for e500 coreHaiying Wang3-8/+24
2009-01-2485xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boardsKumar Gala1-4/+12
2009-01-2485xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boardsKumar Gala1-4/+12
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