| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2021-07-24 | doc: fix board/openpiton/riscv64.rst | Heinrich Schuchardt | 1 | -10/+9 | |
| * remove duplicate heading to avoid build error with 'make htmldocs' * length of underlines must match header * use appropriate header levels * fix type %s/linux/Linux/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> | |||||
| 2021-07-06 | board: riscv: add openpiton-riscv64 SoC support | Tianrui Wei | 2 | -0/+385 | |
| This patch adds openpiton-riscv64 SOC support. In particular, this board supports a standard bootflow through zsbl->u-boot SPL-> opensbi->u-boot proper->Linux. There are separate defconfigs for building u-boot SPL and u-boot proper Signed-off-by: Tianrui Wei <tianrui-wei@outlook.com> Signed-off-by: Jonathan Balkind <jbalkind@ucsb.edu> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> | |||||
 |
index : starfive-tech/u-boot.git | |
| StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |