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2021-08-09ddr: Add DDR driver for iMX8ULPYe Li1-0/+1
Add iMX8ULP DDR initialization driver which loads the DDR timing parameters and executes the training procedure. When enabling IMX8ULP_DRAM_PHY_PLL_BYPASS, using PHY PLL bypass mode to do DDR init Signed-off-by: Ye Li <ye.li@nxp.com>
2021-07-28Makefile: Move drivers/i2c/ into drivers/MakefileSimon Glass1-4/+0
This rule should not be in the top-level Makefile. Now that we have a consistent set of I2C Kconfigs for U-Boot proper, SPL and TPL, we can move it. Make use of the existing SPL/TPL rule in drivers/Makefile instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28i2c: Rename SPL/TPL_I2C_SUPPORT to I2CSimon Glass1-1/+5
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISCSimon Glass1-1/+1
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename GPIO_SUPPORT to GPIOSimon Glass1-1/+1
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOSTSimon Glass1-1/+1
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_WATCHDOG_SUPPORT to SPL_WATCHDOGSimon Glass1-1/+1
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_MUSB_NEW_SUPPORT to SPL_MUSB_NEWSimon Glass1-1/+1
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_ETH_SUPPORT to SPL_ETHSimon Glass1-2/+2
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_CRYPTO_SUPPORT to SPL_CRYPTOSimon Glass1-1/+1
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_POWER_SUPPORT to SPL_POWERSimon Glass1-2/+2
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-28Makefile: Move phy rules into drivers/phySimon Glass1-4/+0
These don't belong in the drivers Makefile so move them down into the correct place. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Fixup some missing dependencies this exposed] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-23reboot-mode: add support for reboot mode controlNandor Han1-0/+1
A new driver uclass is created to handle the reboot mode control. The new uclass driver is updating an environment variable with the configured reboot mode. The mode is extracted from a map provided at initialization time. The map contains a list of modes and associated ids. Signed-off-by: Nandor Han <nandor.han@vaisala.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-14phy: socionext: Add UniPhier PCIe PHY driverKunihiko Hayashi1-0/+1
Add PCIe PHY driver support for Pro5, LD20 and PXs3 SoCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
2021-03-27cpu: Rename SPL_CPU_SUPPORT to SPL_CPUSimon Glass1-1/+1
The _SUPPORT suffix is from an earlier time and interferes with use of the CONFIG_IS_ENABLED() macro. Rename the option to drop the suffix. Tidy up the TODO that prompted this. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-28bootcount: allow to use this feature on TPLPhilippe Reynes1-0/+1
This commit add an option TPL_BOOTCOUNT_LIMIT to use bootcount on TPL. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-11-06board: Rename uclass to sysinfoSimon Glass1-1/+1
This uclass is intended to provide a way to obtain information about a U-Boot board. But the concept of a U-Boot 'board' is the whole system, not just one circuit board, meaning that 'board' is something of a misnomer for this uclass. In addition, the name 'board' is a bit overused in U-Boot and we want to use the same uclass to provide SMBIOS information. The obvious name is 'system' but that is so vague as to be meaningless. Use 'sysinfo' instead, since this uclass is aimed at providing information on the system. Rename everything accordingly. Note: Due to the patch delta caused by the symbol renames, this patch shows some renamed files as being deleted in one place and created in another. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-10-28drivers: Add a new framework for multiplexer devicesJean-Jacques Hiblot1-0/+1
Add a new subsystem that handles multiplexer controllers. The API is the same as in Linux. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> [trini: Update some error calls to use different functions or pass correct arguments] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-23fpga: kconfig: Rename SPL_FPGA_SUPPORT to SPL_FPGAMichal Simek1-2/+1
The patch does sed 's/SPL_FPGA_SUPPORT/SPL_FPGA/g' but also fixing Makefile and zynqmp.c to simplify if/endif logic in zynqmp.c. This change is mostly done to be able to use CONFIG_IS_ENABLED macro and obj-$(CONFIG_$(SPL_)FPGA) in Makefile. For them symbols need to be in sync. And removing one line from Topic Miami boards which is not needed because symbol is not enabled via Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-14xen: Port Xen hypervisor related code from mini-osOleksandr Andrushchenko1-0/+1
Port hypervisor related code from Mini-OS. This is referencing the code of Mini-OS from [1] by Huang Shijie and Volodymyr Babchuk which is for ARM64. Update essential arch code to support required bit operations, memory barriers etc. Copyright for the bits ported belong to at least the following authors, please see related files for details: Copyright (c) 2002-2003, K A Fraser Copyright (c) 2005, Grzegorz Milos, gm281@cam.ac.uk,Intel Research Cambridge Copyright (c) 2014, Karim Allah Ahmed <karim.allah.ahmed@gmail.com> [1] - https://github.com/zyzii/mini-os.git Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> [trini: Drop wmb() from musb-net/linux-compat.h now] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-29dm: button: add an uclass for buttonPhilippe Reynes1-0/+1
Add a new uclass for button that implements two functions: - button_get_by_label - button_get_status Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-07-11bus: uniphier-system-bus: add UniPhier System Bus driverMasahiro Yamada1-0/+1
Since commit 1517126fdac2 ("ARM: uniphier: select DM_ETH"), DM-based drivers/net/smc911x.c is compiled, but it is never probed because the parent node lacks the DM-based driver. I need a skeleton driver to populate child devices (but the next commit will move more hardware settings to the this driver). I put this to drivers/bus/uniphier-system-bus.c because this is the same path as the driver in Linux kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-29phy: rockchip: Add Rockchip USB2PHY driverJagan Teki1-0/+1
Add Rockchip USB2PHY driver with initial support. This will help to use it for EHCI controller in host mode, and USB 3.0 controller in otg mode. More functionality like charge, vbus detection will add it in future changes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-03-03drivers: Descend to drivers/soc unconditionallyVignesh Raghavendra1-1/+2
Descend to drivers/soc directory unconditionally for SPL and U-Boot builds. Individual drivers can have their own config to check what needs to be built for SPL. There should be no increase in SPL code size due to this change. This is required on K3 SoCs to support DMA in SPL. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-01-16Kconfig: Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMAVignesh Raghavendra1-1/+1
Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA. This allows to use macros such as CONFIG_IS_ENABLED() that allow conditional compilation of code for SPL and U-Boot. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-09Merge tag 'efi-2020-04-rc1' of ↵Tom Rini1-0/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-04-rc1 This pull request provides: * support for FIT images for UEFI binaries * drivers for hardware random number generators * an implementation of the EFI_RNG_PROTOCOL * a sub-command for efidebug to display configuration tables
2020-01-08Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini1-0/+1
2020-01-07dm: rng: Add random number generator(rng) uclassSughosh Ganu1-0/+1
Add a uclass for reading a random number seed from a random number generator device. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07drivers: board: Make the board drivers available in SPLJean-Jacques Hiblot1-1/+1
Make the board driver available in the SPL too. The board driver is a way to provide useful information about the board and that can be useful in the SPL too. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07spl: Allow cache drivers to be used in SPLLey Foon Tan1-0/+1
Add an option for building cache drivers in SPL. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-12-15x86: sandbox: Add a PMC emulator and testSimon Glass1-0/+1
Add a simple PMC for sandbox to permit tests to run. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-10spl: cache: Allow cache drivers in SPLRick Chen1-0/+1
When ax25-ae350 try to enable v5l2 cache driver in SPL configuration, it need this option for cache support in SPL. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Cc: Alan Kao <alankao@andestech.com>
2019-12-05mtd: Makefile: deep cleanupMiquel Raynal1-5/+2
Move MTD-related lines out of the root Makefile. Put them in their respective directories. Enclose some of these new lines to skip them when building the SPL. MTD core files and some MTD device drivers are compiled in a mtd.o object and included in the final object only if MTD support is required (there are two different symbols for that, one for U-Boot and one for the SPL). Now that all defconfigs have been fixed, we can stop the logic where enabling a command selects the core files to compile. This logic is broken since selecting a symbol with a 'depends on' will not enforce this secondary dependency. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-10-24ufs: Add Initial Support for UFS subsystemFaiz Abbas1-0/+1
Add Support for UFS Host Controller Interface (UFSHCI) for communicating with Universal Flash Storage (UFS) devices. The steps to initialize the host controller interface are the following: - Initiate the Host Controller Initialization process by writing to the Host controller enable register. - Configure the Host Controller base address registers by allocating a host memory space and related data structures. - Unipro link startup procedure - Check for connected device - Configure UFS host controller to process requests Also register this host controller as a SCSI host controller. Taken from Linux Kernel v5.2 (drivers/scsi/ufs/ufshcd.c) and ported to U-boot. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-08-12Drop PCMCIASimon Glass1-1/+0
This is no-longer used in U-Boot and has not been converted to driver model. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-21spl: kconfig: separate sysreset and firmware drivers from miscSimon Goldschmidt1-3/+3
This adds separate kconfig options for drivers/sysreset and drivers/firmware. Up to now, CONFIG_SPL_DRIVERS_MISC_SUPPORT added drivers/misc to SPL build but also added drivers/firmware and drivers/sysreset at the same time. Since that is confusing, this patch uses CONFIG_SPL_SYSRESET for drivers/sysreset and adds CONFIG_SPL_FIRMWARE for drivers/firmware (and accordingly for the TPL options). CONFIG_SPL_DRIVERS_MISC_SUPPORT stays for including drivers/misc into the SPL build (and accordingly for TPL) since there are boards using non-DM (non UCLASS_MISC) files from drivers/misc. Such boards don't have CONFIG_SPL_MISC enabled, so cannot use this to include drivers/misc into the SPL build. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-07-11drivers: pci_ep: Introduce UCLASS_PCI_EP uclassRamon Fried1-0/+1
Introduce new UCLASS_PCI_EP class for handling PCI endpoint devices, allowing to set various attributes of the PCI endpoint device, such as: * configuration space header * BAR definitions * outband memory mapping * start/stop PCI link Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-07Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini1-1/+1
- Assorted stratix10 fixes. - DDR driver DM migration.
2019-05-06ddr: altera: Compile ALTERA SDRAM in SPL onlyLey Foon Tan1-1/+1
Compile ALTERA_SDRAM driver in SPL only. Rename ALTERA_SDRAM to SPL_ALTERA_SDRAM. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-05dm: cache: Create a uclass for cacheDinh Nguyen1-0/+1
The cache UCLASS will be used for configure settings that can be found in a CPU's L2 cache controller. Add a uclass and a test for cache. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-02-20x86: sandbox: pch: Add a CONFIG option for PCHSimon Glass1-1/+2
At present this uclass is selected only on x86. In order to add a test for it, it must also support sandbox. Create a new CONFIG_PCH option and enable it on x86 and sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-01-26dfu: Make DFU support more SPL friendlyAndrew F. Davis1-2/+1
Do this by using $(SPL_) in Makefiles and CONFIG_IS_ENABLED in C code. This ensures the files and features are only built into the right build for which they are enabled. Using the macros to simplify this patch was made possible by the config symbol rename done in the last patch. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lukasz Majewski <lukma@denx.de>
2019-01-26spl: Kconfig: Drop the _SUPPORT postfix from SPL_DFUAndrew F. Davis1-1/+1
The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT to allow for cleaner use in code. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lukasz Majewski <lukma@denx.de>
2019-01-10Kconfig: rename CONFIG_SPL_USB_GADGET_SUPPORT as CONFIG_SPL_USB_GADGETJean-Jacques Hiblot1-3/+3
The SPL option for USB gadget should be named after the option for u-boot (CONFIG_USB_GADGET) Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-01-01Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imxTom Rini1-0/+1
imx for 2019.01 - introduce support for i.MX8M - fix size limit for Vhybrid / pico boards - several board fixes - w1 driver for MX2x / MX5x
2019-01-01drivers: ddr: introduce DDR driver for i.MX8MPeng Fan1-0/+1
Introduce DDR driver for i.MX8M. The driver will be used by SPL to initialze DDR PHY and DDR Controller. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-12-14spl: drivers: Link usb common library to SPL if USB gadget is enabledJean-Jacques Hiblot1-0/+1
Some drivers might need to access common USB functions such as usb_get_maximum_speed() or usb_get_dr_mode(). Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-12spl: fix build failure with !CONFIG_SPL_PCI_SUPPORTSekhar Nori1-1/+1
Building U-Boot with CONFIG_PCI and CONFIG_DM_PCI enabled, but CONFIG_SPL_PCI_SUPPORT disabled, results in following linker error: lib/built-in.o: In function `fdtdec_get_pci_bar32': lib/fdtdec.c:305: undefined reference to `dm_pci_read_bar32' fdtdec.c:305:(.text.fdtdec_get_pci_bar32+0x24): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `dm_pci_read_bar32' This is because reference to dm_pci_read_bar32() remains in lib/fdtdec.c while SPL build does not descend into drivers/pci directory in drivers/Makefile if CONFIG_SPL_PCI_SUPPORT is not enabled. Fix this by applying appropriate #define guards in lib/fdtdec.c. It looks like ns16550.c has the same problem, so fixed that too. To simplify this, CONFIG_SPL_PCI_SUPPORT is renamed to CONFIG_SPL_PCI (enables use of CONFIG_IS_ENABLED() macro). Suggested-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-12blk: Rework guard around part_init callTom Rini1-2/+1
The function part_init() will only be built when we have both CONFIG_PARTITIONS and CONFIG_HAVE_BLOCK_DEVICE set. Protect the call to this function with both of these tests now. Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: York Sun <york.sun@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Stefan Roese <sr@denx.de> Cc: Marek Behún <marek.behun@nic.cz> Cc: Vanessa Maegima <vanessa.maegima@nxp.com> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Adam Ford <aford173@gmail.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-07dm: Add Hardware Spinlock classBenjamin Gaignard1-0/+1
This is uclass for Hardware Spinlocks. It implements two mandatory operations: lock and unlock and one optional relax operation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>