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2020-07-25treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada1-1/+1
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-24Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini1-1/+1
This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-20treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada1-1/+1
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-08sata_sil: Enable DM_PCI operationAndre Przywara2-2/+15
Even though the sata_sil driver was converted over to the driver model, it still assumed that the PCI controller is using the legacy interface. Allow the "devno" member to be a struct udevice pointer and use DM_PCI_COMPAT to covert the rest of the interface. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-19common: Drop linux/bitops.h from common headerSimon Glass2-0/+2
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop linux/delay.h from common headerSimon Glass8-0/+8
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19Fix some checkpatch warnings in calls to udelay()Simon Glass1-8/+8
Fix up some incorrect code style in calls to functions in the linux/time.h header, mostly udelay(). Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop log.h from common headerSimon Glass9-0/+9
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop part.h from common headerSimon Glass7-0/+10
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop net.h from common headerSimon Glass2-0/+2
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-15rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOODTrevor Woerner2-2/+2
Have this symbol follow the pattern of all other such symbols. This patch also removes a TODO from the code. Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5XTrevor Woerner1-1/+1
Have this symbol follow the pattern of all other such symbols. This patch removes a TODO from the code. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-09sata: dwc_ahsata: Fix memory issue in reset_sataYe Li1-0/+3
The reset_sata should reset the sata device info and free the probe_ent memory. Otherwise, it will cause memory leak if we init the sata again. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-09sata: dwc_ahsata: Fix incorrect freeYe Li1-1/+0
Fix coverity issue CID 43665: Free of address-of expression (BAD_FREE) incorrect_free: free frees incorrect pointer pp. pp points the port array field of struct ahci_uc_priv, should not free it. Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-09sata: ahsata: Fix wrong operand for checking SERR DIAG_XYe Li1-1/+1
Fix coverity issue CID 3261683: Wrong operator used (CONSTANT_EXPRESSION_RESULT) operator_confusion: ({...; __v;}) | 67108864 is always 1/true regardless of the values of its operand. This occurs as the logical operand of ! When DIAG_X is set, the PHY COMINIT signal is detected, so should use '&' to check whether it is set. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-09sata: ahsata: Fix resource leakYe Li1-0/+5
Fix coverity issue CID 3606684: Resource leak (RESOURCE_LEAK) leaked_storage: Variable uc_priv going out of scope leaks the storage it points to Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-02-25Revert "ata: fsl_ahci: Add sata DM support for Freescale powerpc socs"Peng Ma3-1042/+0
This reverts commit 1ee494291880fd51ef0c5f7342e072bdb069d7ff. Commit 1ee494291880 ("ata: fsl_ahci: Add sata DM support for Freescale powerpc socs") introduced SCSI layer to call AHCI private API in order to support sata operations, In DM mode, This is not necessary for non-AHCI sata. So revert it and have already updated the driver itself to operate sata directly. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-08ata: fsl_sata: Continue probing other sata port when failed current port.Peng Ma1-7/+51
In the initialization of sata driver, we want to initialize all port probes, Therefore, any detection failure between of them should continue initialization by skipping the current port instead of exit. Signed-off-by: Peng Ma <peng.ma@nxp.com>
2020-01-08ata: sata_sil: Continue probing other sata port when failed current port.Peng Ma1-4/+56
In the initialization of sata driver, we want to initialize all port probes, Therefore, any detection failure between of them should continue initialization by skipping the current port instead of exit. Signed-off-by: Peng Ma <peng.ma@nxp.com>
2019-12-03common: Move ARM cache operations out of common.hSimon Glass6-0/+6
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-19ata: sata_sil: Add DM support for Silicon sata driverPeng Ma3-193/+353
Add DM support for Silicon(SIL3131 / SIL3132 / SIL3124) sata driver as few of the PowerPC platforms such as P series based boards need to use SATA_SIL with DM, Also fix below warning while PowerPC P series boards compilation, ===================== WARNING ======================" This board does use CONFIG_LIBATA but has CONFIG_AHCI not" enabled. Please update the storage controller driver to use" CONFIG_AHCI before the v2019.07 release." Failure to update by the deadline may result in board removal." See doc/driver-model/MIGRATION.txt for more info." ====================================================" Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-19ata: fsl_sata: Add DM support for Freescale PowerPC SATA driverPeng Ma3-88/+233
Add DM support for Freescale PowerPC sata driver used for PowerPC T series SoCs, CONFIG_BLK needs to be enabled on these platforms. It adds the SATA controller as AHCI device, which is strictly speaking not correct, as the controller is not AHCI compatible, But the U-Boot AHCI uclass interface enables the usage of this DM driver, Also fix below warning while PowerPC T series boards compilation, ===================== WARNING ======================" This board does use CONFIG_LIBATA but has CONFIG_AHCI not" enabled. Please update the storage controller driver to use" CONFIG_AHCI before the v2019.07 release." Failure to update by the deadline may result in board removal." See doc/driver-model/MIGRATION.txt for more info." ====================================================" Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-10-31ata: ahci allow 64-bit DMA for SATARoman Kapl1-3/+11
Allow 64-bit DMA on AHCI. If not supported by the host controller, at least print a message and fail. Signed-off-by: Roman Kapl <rka@sysgo.com>
2019-10-11ata: ahci: Don't forget to clear upper address regs.Oleksandr Rybalko1-4/+7
In 32bits mode upper bits need to be set to 0, otherwise controller will try to DMA into not existing memory and stops with error. Tested-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Oleksandr Rybalko <ray@ddteam.net>
2019-10-11ahci-pci: ASM1061 report wrong class, but support AHCI.Oleksandr Rybalko1-0/+1
Tested-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Oleksandr Rybalko <ray@ddteam.net>
2019-08-26dm: scsi: Scan the actual number of portsPark, Aiden1-0/+8
The scsi_scan_dev() is looping over the number of uc_plat->max_id. The number of actual ports a AHCI controller has can be greater than max_id. Update uc_plat->max_id to make SCSI scan all detected ports. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-23ata: fsl_ahci: Add sata DM support for Freescale powerpc socsPeng Ma4-0/+1042
This patch is to support Freescale sata driver with dts initialized. Also resolved the following problems. ===================== WARNING ====================== This board does not use CONFIG_DM_SCSI. Please update the storage controller to use CONFIG_DM_SCSI before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-22scsi: ceva: Clean up the driver codePeng Ma1-17/+33
Distinguish the ecc val by chassis version and move the ecc addr to dts. Add ls1028a soc support. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-18ata: ahci: drop read-only ahci_ioports membersChristian Gmeiner1-12/+0
Also get rid of ahci_setup_port(..). Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2019-05-10ata: ahci: fix memory leakChristian Gmeiner1-4/+1
malloc(..) and memalign(..) are both allocating memory and as a result we leak the memory allocated with malloc(..). Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-17Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini3-0/+134
- Convert DM_MMC and DM_SCSI - A20, R40, H6 Linux dts(i) sync - CLK, RESET support for sunxi, sun8_emac net drivers
2019-04-17sunxi: update SATA driver to always use DM_SCSIAndre Przywara3-0/+134
It seems like the Allwinner SATA driver is already quite capable of using the driver model, so we can force this on all boards and can remove support for a non-DM_SCSI build. This removes the warning about boards with SATA ports not being DM_SCSI compliant. It also takes the opportunity to move the driver out of the board/sunxi directory to join its siblings in drivers/ata, and to make it a proper Kconfig citizen. The board defconfigs stay untouched. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: select DM_SCSI separately] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-13ata: dwc_ahsata: Add ahci driver model supportSoeren Moch2-0/+32
Disable this support for cm_fx6 to avoid breakage. Signed-off-by: Soeren Moch <smoch@web.de>
2019-04-13ata: dwc_ahsata: Fix sector reports for large disksSoeren Moch1-11/+3
Do not report negative sector numbers for disks > 1TB, do not limit sector numbers to 32 bit if CONFIG_SYS_64BIT_LBA is enabled. Signed-off-by: Soeren Moch <smoch@web.de>
2019-04-12sata: sata_mv: add orion-sata compatible stringMichael Walle1-0/+1
The kirkwood devices are compatible with this driver. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12sata: sata_mv: support kirkwood architectureMichael Walle1-4/+3
Fix the worng include and offset macros. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12sata: sata_mv: use correct format specifier in debug()Michael Walle1-1/+1
This fixes a compile error on kirkwood. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12ata: ahci_mvebu: add support for Armada 38xBaruch Siach1-0/+1
With board_ahci_enable() implementation for Armada 38x in place we can now enable 38x support in the ahci_mvebu driver. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-12sata: sata_mv: Add DM support to enable CONFIG_BLK usageStefan Roese2-149/+197
This patch adds DM support to the Armada XP SATA driver. This is needed to enable CONFIG_BLK on this platform. It adds the SATA controller as AHCI device, which is strictly speaking not correct, as the controller is not AHCI compatible. But the U-Boot AHCI uclass interface enables the usage of this DM driver and the creation of the corresponding BLK devices. This conversion is done to get rid of the compile warning: Reviewed-by: Chris Packham <judge.packham@gmail.com> ===================== WARNING ====================== This board does not use CONFIG_DM_SCSI. Please update the storage controller to use CONFIG_DM_SCSI before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
2018-12-07scsi: ceva: add ls2080a soc supportPeng Ma1-0/+4
Add ahci compatible support for ls2080a soc. Signed-off-by: Peng Ma <peng.ma@nxp.com> Acked-by: Michal Simek <michal.simek@xilinx.com> [YS: add fallthrough comment] Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-07scsi: ceva: add ls1088a soc supportPeng Ma1-4/+18
Add ahci compatible support for ls1088a soc. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-07scsi: ceva: add ls1046a soc supportPeng Ma1-0/+3
Add ahci compatible support for ls1046a soc. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-29Merge tag 'fsl-qoriq-for-v2018.11-rc1' of git://git.denx.de/u-boot-fsl-qoriqTom Rini1-1/+27
Switch to driver model for eSDHC on Layerscape SoCs including LS1021A, LS1043A, LS1046A, LS1088A, LS2088A. Switch to driver model for SATA on LS1021A and LS1043A. Add support for LS1012AFRWY rev C board. Enable SMMU for LS1043A.
2018-09-27scsi: ceva: add ls1021a soc support.Peng Ma1-1/+24
Add ahci compatible support for ls1021a soc. Signed-off-by: Peng Ma <peng.ma@nxp.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27scsi: ceva: add ls1043a soc supportPeng Ma1-0/+3
Add ahci compatible support for ls1043a soc. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-26ata: ahci: Don't cap AHCI port count under CONFIG_DM_SCSITuomas Tynkkynen1-0/+2
When using device model this sort of hardcoded limits aren't used or necessary. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-26ata: ahci: Loop over the actual number of ports, not the maximumTuomas Tynkkynen1-1/+1
The loop in ahci_start_ports() is looping over the maximum number of SCSI devices in the system, which can be larger than the amount of ports a particular AHCI controller has. The extra looping isn't directly harmful because the link_port_map bitmap won't have the bit set for a nonexistent port, but it is wasteful. Replace the loop limit with the port count of the AHCI controller instead. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26scsi: ceva: add ls1012a soc supportYuantian Tang1-35/+52
Make the code structure more general so that more socs can be added easily and also remove speed limitation restriction. Add the ls1012a sata support as well. Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (with and without CONFIG_OF_LIVE on zynqmp zcu102) Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-29ata: ahci_mvebu: add scsi supportKen Ma2-1/+17
Mvebu AHCI is AHCI driver which uses SCSI under the hood. This patch adjusts AHCI setup to support SCSI by creating a SCSI device as a child. Since the functions of creating SCSI device need the kconfig option DM_SCSI, so let AHCI_MVEBU select DM_SCSI. Signed-off-by: Ken Ma <make@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29ata: ahci_mvebu: a8040 a0: remove bad port register offsets workaroundsDavid Sniatkiwicz1-8/+0
This workaround was added for A8040/7040 A0. A8040/7040 A0 is no longer supported so this workaround can be removed. Signed-off-by: David Sniatkiwicz <davidsn@marvell.com> Signed-off-by: Ken Ma <make@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Roese <sr@denx.de>
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-25 14:38:00 +0300