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2021-09-14pci: acpi: Drop DM_PCI check from ahciSimon Glass1-55/+0
We don't need these checks anymore since when PCI is enabled, driver model is always used. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-10arm: mvebu : sata_mv should probe all portsTony Dinh1-4/+10
While a board could have multiple SATA ports, some of the ports might not have a disk attached to them. So while probing for disks, sata_mv_probe() should continue probing all ports, and skip one with no disk attached. Tests with: - Seagate Goflex Net (Marvell Kirkwood 88F6281) out-of-tree u-boot. - Zyxel NSA325 (Marvell Kirkwood 88F6282 out-of-tree u-boot. Observation: If a board has 2 or more SATA ports, and there is only one disk attached to one of the ports, sata_mv_probe() does not return a successful probe status. And if only one disk is attached to the 2nd port (i.e. port 1), it is not probed at all. Patch Description: Let sata_mv_probe() continues probing all ports, even if there is error in probing a given port, and then return a successful status if there is at least one port was probed successfully. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: mvebu: sata_mv failed to identify HDDs during cold startTony Dinh1-2/+27
During cold start, with some HDDs, mv_sata_identify() does not populate the ID words on the 1st ATA ID command. In fact, the first ATA ID command will only power up the drive, and then the ATA ID command processing is lost in the process. Tests with: - Seagate ST9250320AS 250GB HDD and Seagate ST4000DM004-2CV104 4TB HDD. - Zyxel NSA310S (Kirkwood 88F6702), Marvell Dreamplug (Kirkwood 88F6281), Seagate GoFlex Home (Kirkwood 88F6281), Pogoplug V4 (Kirkwood 88F6192). Observation: - The Seagate ST9250320AS 250GB took about 3 seconds to spin up. - The Seagate ST4000DM004-2CV104 4TB took about 8 seconds to spin up. - mv_sata_identify() did not populate the ID words after the call to mv_ata_exec_ata_cmd_nondma(). - Attempt to insert a long delay of 30 seconds, ie. mdelay(30_000), after the call to ata_wait_register() inside mv_ata_exec_ata_cmd_nondma() did not help with the 4TB drive. The ID words were still empty after that 30s delay. Patch Description: - Added a second ATA ID command in mv_sata_identify(), which will be executed if the 1st ATA ID command did not return with valid ID words. - Use the HDD drive capacity in the ID words as a successful indicator of ATA ID command. - In the scenario where a box is rebooted, the 1st ATA ID command is always successful, so there is no extra time wasted. - In the scenario where a box is cold started, the 1st ATA command is the power up command. The 2nd ATA ID command alleviates the uncertainty of how long we have to wait for the ID words to be populated by the SATA controller. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2021-08-06pci: sata_sil: Drop DM_PCI checksSimon Glass2-12/+0
We don't need these checks anymore since when PCI is enabled, driver model is always used. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-07Merge tag 'dm-pull-6jul21' of https://source.denx.de/u-boot/custodians/u-boot-dmTom Rini1-0/+2
various minor sandbox improvements
2021-07-06ata: ahci-pci: Use scsi_ops to initialize opsMasami Hiramatsu1-0/+2
Without this fix, scsi-scan will cause a synchronous abort when accessing ops->scan. Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-06dm: define LOG_CATEGORY for all uclassPatrick Delaunay1-0/+2
Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24ata: ahci: fix ahci_link_up() type mismatch for LTOMarek Behún1-1/+1
When building highbank_defconfig with LTO, the compiler complains about type mismatch of function ahci_link_up(). The third parameter of this function is of type u8 in drivers/ata/ahci.c, but of type int in board/highbank/ahci.c. There is no reason in using u8, and the code using this function actually passes an int variable into the function (so it is implicitly converted to u8). Change the type of this parameter to int in drivers/ata/ahci.c. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-11ata: Make LIBATA means AHCI is enabled mandatory.Tom Rini1-2/+4
The migration deadline for having LIBATA mean that AHCI is also enabled was v2019.07. As that has long since passed, adjust the Kconfig dependencies. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-23ata: ahci: Fix usage on big-endian platformsStefan Roese1-12/+11
This patch adds a few missing virt_to_phys() to use the correct physical address for DMA operations in the common AHCI code. This is done to support the big-endian MIPS Octeon platform. Additionally the code a cleaned up a bit (remove some empty lines) and made a bit better readable. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23sata: ahci_mvebu.c: Enable AHCI/SATA driver for MIPS OcteonStefan Roese2-2/+3
This patch enables the usage of the MVEBU AHCI/SATA driver. The only changes necessary to support MIPS Octeon via DT based probing are, to add the compatible DT property and the use of dev_remap_addr() so that the correct mapped address is used in the Octeon case (phys != virt). Please note that this driver supports the usage of the "scsi" command and not the "sata" command, since it does not provide an own "scan" function, which is needed for the "sata" cmd support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-20drivers: ata: ahci: update max id if it is more than available portsSuneel Garapati1-0/+3
After check for maximum between max id and available ports, also check if available port count is less than max id and update. In the case of the CN8030 OcteonTX SoC max_id needs to be reduced to the number of ports found otherwise the following occurs on a scan: GW6404-B> scsi scan scanning bus for devices... Target spinup took 0 ms. AHCI 0001.0300 32 slots 1 ports 6 Gbps 0x1 impl SATA mode flags: 64bit ncq ilck stag pm led clo only pmp fbss pio slum part ccc apst Device 0: (0:0) Vendor: ATA Prod.: SanDisk SD8SFAT0 Rev: Z233 Type: Hard Disk Capacity: 61057.3 MB = 59.6 GB (125045424 x 512) "Synchronous Abort" handler, esr 0x96000006 elr: 000000000052f824 lr : 000000000052fa10 (reloc) elr: 000000007fee9824 lr : 000000007fee9a10 x0 : 0000000000000001 x1 : 0000000000000001 x2 : 000000007bea3528 x3 : 000000007bea3580 x4 : 0000000000000200 x5 : 0000000000000000 x6 : 0000000000000002 x7 : 000000007bea3540 x8 : 00000000fffffff8 x9 : 0000000000000008 x10: 00000000000186a0 x11: 000000000000000d x12: 0000000000000006 x13: 000000000001869f x14: 0000000000000007 x15: 00000000ffffffff x16: 000000007ff439a5 x17: 000000007ff5730c x18: 000000007bea9de0 x19: 000000007ff7a580 x20: 000000007bec79f8 x21: 0000000000000000 x22: 000000007bea3580 x23: 0000000000000000 x24: 0000000000000000 x25: 000000007bec7a00 x26: 00000000ffffffc0 x27: 000000007bec79d0 x28: 000000007beb51c0 x29: 000000007bea3480 Code: 91246800 940130c2 12800000 1400004f (b9402ae0) Resetting CPU ... Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-04-10drivers: ata: Remove mvsata_ide driverTom Rini3-206/+0
The mvsata_ide driver was due for DM conversion by v2019.07. As that has long passed, remove the driver and disable it in the boards which had enabled it. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10ata: DWC_AHSATA depends on BLKTom Rini1-0/+1
The dwc ahsata driver is written such that CONFIG_BLK must be enabled, add this as a dependency in Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-03-19ahci: mediatek: fix undefined reference of dev_errFrank Wunderlich1-0/+1
building with MTK_AHCI enabled results in implicit declaration and undefined reference of dev_err followed by a segfault of gcc drivers/ata/mtk_ahci.c: In function 'mtk_ahci_parse_property': drivers/ata/mtk_ahci.c:65:4: warning: implicit declaration of function 'dev_err' drivers/ata/mtk_ahci.c:65: undefined reference to `dev_err' in function `mtk_ahci_probe': drivers/ata/mtk_ahci.c:92: undefined reference to `dev_err' Segmentation fault fix this by adding the dm/device_compat.h to includes Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass3-0/+4
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-01ata: sunxi: fix debug messagesDario Binacchi1-4/+4
It is useless and misleading to print the ret variable that is not set by the dev_read_addr routine. Also, move the '\n' character after the round bracket that contains the error code. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-05dm: core: Access device ofnode through functionsSimon Glass1-1/+2
At present ofnode is present in the device even if it is never used. With of-platdata this field is not used, so can be removed. In preparation for this, change the access to go through inline functions. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass1-3/+3
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass4-8/+8
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass3-28/+28
Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass5-13/+13
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass7-9/+9
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-08ata: dwc-ahci: change trace level for phy errors managed by uclassPatrick Delaunay1-2/+2
As the error message is now displayed by generic phy functions, the pr_err can be change to pr_debug. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-08-25Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini1-0/+15
- Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel) - Infrastructure changes to PCI uclass to support these SoC's (Suneel) - Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel) - Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
2020-08-25ata: ahci: Add BAR index quirk for Cavium PCI SATA deviceSuneel Garapati1-0/+15
For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0 instead of BAR5. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24ahci: mediatek: fix copyright and author-linesFrank Wunderlich1-4/+2
after review of sam copyright should be on one line and link should not between author lines just remove the link and put ryder first as he is author of linux-driver Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-22ata: mvebu: use dev_read_addr() to get base addressMasahiro Yamada1-1/+1
It is strange to use devfdt_get_addr_ptr(), then cast the pointer back to ulong because you could use devfdt_get_addr() without casting. Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-20ahci: mediatek: add ahci driverFrank Wunderlich3-0/+139
add AHCI driver ported from linux https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/ata/ahci_mtk.c Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-07-25treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada1-1/+1
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-24Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini1-1/+1
This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-20treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada1-1/+1
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-08sata_sil: Enable DM_PCI operationAndre Przywara2-2/+15
Even though the sata_sil driver was converted over to the driver model, it still assumed that the PCI controller is using the legacy interface. Allow the "devno" member to be a struct udevice pointer and use DM_PCI_COMPAT to covert the rest of the interface. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-19common: Drop linux/bitops.h from common headerSimon Glass2-0/+2
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop linux/delay.h from common headerSimon Glass8-0/+8
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19Fix some checkpatch warnings in calls to udelay()Simon Glass1-8/+8
Fix up some incorrect code style in calls to functions in the linux/time.h header, mostly udelay(). Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop log.h from common headerSimon Glass9-0/+9
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop part.h from common headerSimon Glass7-0/+10
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop net.h from common headerSimon Glass2-0/+2
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-15rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOODTrevor Woerner2-2/+2
Have this symbol follow the pattern of all other such symbols. This patch also removes a TODO from the code. Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5XTrevor Woerner1-1/+1
Have this symbol follow the pattern of all other such symbols. This patch removes a TODO from the code. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-09sata: dwc_ahsata: Fix memory issue in reset_sataYe Li1-0/+3
The reset_sata should reset the sata device info and free the probe_ent memory. Otherwise, it will cause memory leak if we init the sata again. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-09sata: dwc_ahsata: Fix incorrect freeYe Li1-1/+0
Fix coverity issue CID 43665: Free of address-of expression (BAD_FREE) incorrect_free: free frees incorrect pointer pp. pp points the port array field of struct ahci_uc_priv, should not free it. Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-09sata: ahsata: Fix wrong operand for checking SERR DIAG_XYe Li1-1/+1
Fix coverity issue CID 3261683: Wrong operator used (CONSTANT_EXPRESSION_RESULT) operator_confusion: ({...; __v;}) | 67108864 is always 1/true regardless of the values of its operand. This occurs as the logical operand of ! When DIAG_X is set, the PHY COMINIT signal is detected, so should use '&' to check whether it is set. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-09sata: ahsata: Fix resource leakYe Li1-0/+5
Fix coverity issue CID 3606684: Resource leak (RESOURCE_LEAK) leaked_storage: Variable uc_priv going out of scope leaks the storage it points to Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-02-25Revert "ata: fsl_ahci: Add sata DM support for Freescale powerpc socs"Peng Ma3-1042/+0
This reverts commit 1ee494291880fd51ef0c5f7342e072bdb069d7ff. Commit 1ee494291880 ("ata: fsl_ahci: Add sata DM support for Freescale powerpc socs") introduced SCSI layer to call AHCI private API in order to support sata operations, In DM mode, This is not necessary for non-AHCI sata. So revert it and have already updated the driver itself to operate sata directly. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-08ata: fsl_sata: Continue probing other sata port when failed current port.Peng Ma1-7/+51
In the initialization of sata driver, we want to initialize all port probes, Therefore, any detection failure between of them should continue initialization by skipping the current port instead of exit. Signed-off-by: Peng Ma <peng.ma@nxp.com>
2020-01-08ata: sata_sil: Continue probing other sata port when failed current port.Peng Ma1-4/+56
In the initialization of sata driver, we want to initialize all port probes, Therefore, any detection failure between of them should continue initialization by skipping the current port instead of exit. Signed-off-by: Peng Ma <peng.ma@nxp.com>
2019-12-03common: Move ARM cache operations out of common.hSimon Glass6-0/+6
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-19ata: sata_sil: Add DM support for Silicon sata driverPeng Ma3-193/+353
Add DM support for Silicon(SIL3131 / SIL3132 / SIL3124) sata driver as few of the PowerPC platforms such as P series based boards need to use SATA_SIL with DM, Also fix below warning while PowerPC P series boards compilation, ===================== WARNING ======================" This board does use CONFIG_LIBATA but has CONFIG_AHCI not" enabled. Please update the storage controller driver to use" CONFIG_AHCI before the v2019.07 release." Failure to update by the deadline may result in board removal." See doc/driver-model/MIGRATION.txt for more info." ====================================================" Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-07 14:09:45 +0300