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:
starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
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path:
root
/
drivers
/
clk
/
renesas
/
r8a77990-cpg-mssr.c
Age
Commit message (
Expand
)
Author
Files
Lines
2023-02-02
clk: renesas: Add and enable CPG reset driver
Marek Vasut
1
-9
/
+6
2023-02-02
clk: renesas: Synchronize R8A77990 E3 clock tables with Linux 6.1.7
Marek Vasut
1
-10
/
+13
2021-05-21
clk: renesas: Make reset controller modemr register offset configurable
Marek Vasut
1
-0
/
+1
2021-05-21
clk: renesas: Reinstate RPC clock on R-Car D3/E3
Marek Vasut
1
-0
/
+9
2021-05-21
clk: renesas: Synchronize R-Car Gen3 tables with Linux 5.12
Marek Vasut
1
-16
/
+21
2021-04-26
clk: renesas: Only ever access documented bits in clock driver teardown
Marek Vasut
1
-12
/
+12
2020-12-13
dm: treewide: Rename auto_alloc_size members to be shorter
Simon Glass
1
-1
/
+1
2020-05-19
common: Drop linux/bitops.h from common header
Simon Glass
1
-0
/
+1
2019-04-09
clk: renesas: Synchronize Gen3 tables with Linux 5.0
Marek Vasut
1
-15
/
+22
2018-06-14
clk: rmobile: Add R8A77990 RPC clock
Marek Vasut
1
-0
/
+5
2018-06-02
Merge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini
1
-0
/
+302
2018-06-01
clk: renesas: Add R8A77990 E3 clock tables
Marek Vasut
1
-0
/
+303