starfive-tech/u-boot.git - StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2023-04-07	clk: renesas: Add R8A779F0 S4 clock tables	Hai Pham	3	-0/+257
2023-04-07	clk: renesas: Update R-Car Gen3 driver Gen4 support	Marek Vasut	6	-55/+138
2023-03-27	Merge branch 'master' into next	Tom Rini	1	-4/+6
2023-03-20	clk: renesas: Pack reset identifier before look up	Marek Vasut	1	-4/+6
2023-03-18	clk: renesas: rcar-gen3: Replace SSCG caching with MDSEL/PE caching	Marek Vasut	2	-10/+10
2023-03-10	clk: renesas: Always select DM_RESET to prevent inobvious failure of rst_gen3...	Marek Vasut	1	-0/+1
2023-02-02	clk: renesas: rcar-gen3: Factor out CPG library	Hai Pham	5	-122/+230
2023-02-02	clk: renesas: Add R8A77970 SD0H/SD0 clocks for SDHI	Hai Pham	3	-5/+44
2023-02-02	clk: renesas: Switch to new SD clock handling	Hai Pham	2	-91/+112
2023-02-02	clk: renesas: Handle E3/D3 RPCSRC clock	Hai Pham	1	-0/+31
2023-02-02	clk: renesas: Introduce and use rcar_clk_get_rate64_div_table function	Hai Pham	2	-34/+64
2023-02-02	clk: renesas: Convert Gen2/Gen3 clock tables to clk-provider struct clk_div_t...	Marek Vasut	2	-11/+3
2023-02-02	clk: renesas: Drop core param from gen3_clk_get_rate64_pll_mul_reg	Marek Vasut	1	-14/+13
2023-02-02	clk: renesas: Use pre-defined offset for RPC clocks	Hai Pham	2	-4/+1
2023-02-02	clk: renesas: Add and enable CPG reset driver	Marek Vasut	14	-112/+153
2023-02-02	clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support	Hai Pham	3	-0/+26
2023-02-02	clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960	Hai Pham	2	-4/+4
2023-02-02	clk: renesas: Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.1.7	Marek Vasut	1	-10/+13
2023-02-02	clk: renesas: Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.1.7	Marek Vasut	1	-11/+12
2023-02-02	clk: renesas: Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.1.7	Marek Vasut	1	-11/+14
2023-02-02	clk: renesas: Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.1.7	Marek Vasut	1	-15/+17
2023-02-02	clk: renesas: Synchronize R8A779A0 V3U clock tables with Linux 6.1.7	Marek Vasut	3	-31/+77
2023-02-02	clk: renesas: Synchronize R8A77995 D3 clock tables with Linux 6.1.7	Marek Vasut	2	-8/+14
2023-02-02	clk: renesas: Synchronize R8A77990 E3 clock tables with Linux 6.1.7	Marek Vasut	1	-10/+13
2023-02-02	clk: renesas: Synchronize R8A77980 V3H clock tables with Linux 6.1.7	Marek Vasut	1	-6/+7
2023-02-02	clk: renesas: Synchronize R8A77965 M3-N clock tables with Linux 6.1.7	Marek Vasut	1	-9/+15
2023-02-02	clk: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ clock tables with ...	Marek Vasut	1	-16/+17
2023-02-02	clk: renesas: Synchronize R8A7795 H3 clock tables with Linux 6.1.7	Marek Vasut	1	-9/+19
2023-02-02	clk: renesas: Add dummy SDnH clock	Hai Pham	2	-0/+7
2022-01-13	treewide: invaild -> invalid	Sean Anderson	2	-2/+2
2021-06-24	clk: renesas: Add R8A779A0 clock tables	Hai Pham	7	-0/+338
2021-06-24	clk: renesas: Handle R8A779A0 V3U clock types in Gen3 clock code	Marek Vasut	2	-0/+33
2021-05-21	clk: renesas: Deduplicate gen3_clk_get_rate64() PLL handling	Marek Vasut	1	-43/+43
2021-05-21	clk: renesas: Add register pointers into struct cpg_mssr_info	Hai Pham	3	-45/+65
2021-05-21	clk: renesas: Introduce enum clk_reg_layout	Hai Pham	1	-0/+6
2021-05-21	clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()	Hai Pham	4	-6/+8
2021-05-21	clk: renesas: Make reset controller modemr register offset configurable	Marek Vasut	20	-5/+21
2021-05-21	clk: renesas: Add support for RPCD2 clock	Hai Pham	2	-5/+17
2021-05-21	clk: renesas: Fix Realtime Module Stop Control Register offsets	Hai Pham	1	-1/+1
2021-05-21	clk: renesas: Fix incorrect return RPC clk_get_rate	Hai Pham	1	-1/+1
2021-05-21	clk: renesas: Reinstate RPC clock on R-Car D3/E3	Marek Vasut	2	-0/+18
2021-05-21	clk: renesas: Synchronize R-Car Gen3 tables with Linux 5.12	Marek Vasut	7	-163/+212
2021-05-21	clk: renesas: Synchronize R-Car Gen2 tables with Linux 5.12	Marek Vasut	5	-9/+6
2021-05-21	clk: renesas: Synchronize RZ/G2 tables with Linux 5.12	Marek Vasut	3	-5/+26
2021-04-26	clk: renesas: Synchronize Gen2 MSTP teardown tables	Marek Vasut	3	-6/+6
2021-04-26	clk: renesas: Only ever access documented bits in clock driver teardown	Marek Vasut	7	-81/+81
2021-02-02	common: Drop asm/global_data.h from common header	Simon Glass	2	-0/+2
2020-12-13	dm: treewide: Rename auto_alloc_size members to be shorter	Simon Glass	15	-15/+15
2020-10-20	clk: renesas: Import R8A774C0 clock tables from Linux 5.9	Lad Prabhakar	3	-0/+315
2020-10-20	clk: renesas: Add R8A774E1 clock tables	Biju Das	3	-0/+365