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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
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path:
root
/
drivers
/
clk
Age
Commit message (
Expand
)
Author
Files
Lines
2019-03-09
clk: sunxi: h3: Implement EPHY CLK and RESET
Jagan Teki
1
-0
/
+4
2019-03-09
clk: sunxi: Implement EMAC, GMAC clocks, resets
Jagan Teki
6
-0
/
+15
2019-03-09
clk: sunxi: Implement A10 EMAC clocks
Jagan Teki
2
-0
/
+2
2019-03-04
clk: sunxi: Implement SPI clocks, resets
Jagan Teki
11
-0
/
+97
2019-03-01
Merge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini
1
-10
/
+0
2019-02-27
clk: Add fixed-factor clock driver
Anup Patel
2
-1
/
+77
2019-02-27
clk: Add SiFive FU540 PRCI clock driver
Anup Patel
7
-0
/
+1121
2019-02-25
clk: rmobile: Drop def_bool per SoC
Marek Vasut
1
-10
/
+0
2019-02-09
clk: stm32mp1: correctly handle Clock Spreading Generator
Patrick Delaunay
1
-1
/
+7
2019-02-09
clk: stm32mp1: add debug information
Patrick Delaunay
1
-4
/
+79
2019-02-09
clk: stm32mp1: recalculate counter when switching freq
Patrick Delaunay
1
-2
/
+7
2019-02-09
clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRR
Patrick Delaunay
1
-8
/
+5
2019-02-09
clk: stm32mp1: add IPCC clock
Patrick Delaunay
1
-0
/
+1
2019-02-09
clk: stm32mp1: no more get ck_usbo_48m in device tree
Patrick Delaunay
1
-3
/
+3
2019-02-01
rockchip: clk: Add mention of four new clocks
Simon Glass
1
-0
/
+12
2019-02-01
clk: Improve debug message in clk_set_default_rates()
Simon Glass
1
-2
/
+2
2019-02-01
rockchip: rk3288: Add i2s pinctrl and clock support
Simon Glass
1
-0
/
+48
2019-01-30
sunxi: clk: enable clk and reset for CCU devices
Andre Przywara
1
-0
/
+12
2019-01-29
sunxi: clk: A80: add MMC clock support
Andre Przywara
1
-1
/
+27
2019-01-29
sunxi: clk: add MMC gates/resets
Andre Przywara
11
-0
/
+63
2019-01-18
clk: sunxi: Add Allwinner A80 CLK driver
Jagan Teki
3
-0
/
+65
2019-01-18
clk: sunxi: Add Allwinner H6 CLK driver
Jagan Teki
3
-0
/
+61
2019-01-18
clk: sunxi: Implement UART resets
Jagan Teki
7
-0
/
+43
2019-01-18
clk: sunxi: Implement UART clocks
Jagan Teki
9
-0
/
+57
2019-01-18
clk: sunxi: Add Allwinner V3S CLK driver
Jagan Teki
3
-0
/
+59
2019-01-18
clk: sunxi: Add Allwinner R40 CLK driver
Jagan Teki
3
-0
/
+78
2019-01-18
clk: sunxi: Add Allwinner A83T CLK driver
Jagan Teki
3
-0
/
+71
2019-01-18
clk: sunxi: Add Allwinner A23/A33 CLK driver
Jagan Teki
3
-0
/
+71
2019-01-18
clk: sunxi: Add Allwinner A31 CLK driver
Jagan Teki
3
-0
/
+76
2019-01-18
clk: sunxi: Add Allwinner A10s/A13 CLK driver
Jagan Teki
3
-0
/
+64
2019-01-18
clk: sunxi: Add Allwinner A10/A20 CLK driver
Jagan Teki
3
-0
/
+67
2019-01-18
clk: sunxi: Add Allwinner H3/H5 CLK driver
Jagan Teki
3
-0
/
+87
2019-01-18
reset: Add Allwinner RESET driver
Jagan Teki
2
-0
/
+21
2019-01-18
clk: Add Allwinner A64 CLK driver
Jagan Teki
6
-0
/
+149
2019-01-15
clk: MediaTek: bind ethsys reset controller
Weijie Gao
3
-0
/
+32
2019-01-09
clk: imx8: fix build warning
Peng Fan
1
-0
/
+2
2018-12-29
clk: uniphier: add NAND 200MHz clock
Masahiro Yamada
1
-3
/
+5
2018-12-07
clk: stm32: add hardware spinlock clock
Benjamin Gaignard
1
-0
/
+3
2018-12-07
clk: Allow clock defaults to be set during re-reloc state for SPL only
Philipp Tomsich
1
-0
/
+4
2018-12-04
Merge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini
1
-7
/
+3
2018-12-03
ARM: meson: Add regmap support for clock driver
Loic Devulder
1
-29
/
+30
2018-12-03
clk: renesas: Allow reconfiguring SDHI clock on Gen3
Marek Vasut
1
-7
/
+3
2018-11-30
rockchip: rk3399: Initialize CPU B clock.
Christoph Muellner
1
-9
/
+70
2018-11-30
ARM: rockchip: rv1108: Sync clock with vendor tree
Otavio Salvador
1
-6
/
+469
2018-11-29
Merge tag 'u-boot-amlogic-20181126' of git://git.denx.de/u-boot-amlogic
Tom Rini
3
-4
/
+320
2018-11-29
clk: MediaTek: add clock driver for MT7623 SoC.
Ryder Lee
2
-0
/
+871
2018-11-29
clk: MediaTek: add clock driver for MT7629 SoC.
Ryder Lee
5
-0
/
+1403
2018-11-26
clk: Add clock driver for AXG
Neil Armstrong
2
-1
/
+317
2018-11-26
ARM: meson: rework soc arch file to prepare for new SoC
Jerome Brunet
1
-1
/
+1
2018-11-26
clk: meson: silence debug print
Jerome Brunet
1
-1
/
+1
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