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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
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path:
root
/
drivers
/
clk
Age
Commit message (
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)
Author
Files
Lines
2018-06-02
Merge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini
5
-32
/
+386
2018-06-01
clk: bcm6345: convert to use live dt
Álvaro Fernández Rojas
1
-6
/
+2
2018-06-01
clk: renesas: Add R8A77990 E3 clock tables
Marek Vasut
3
-0
/
+311
2018-06-01
clk: renesas: Add PE clock handling
Marek Vasut
2
-6
/
+40
2018-06-01
clk: renesas: Add PLL1 and PLL3 dividers
Marek Vasut
1
-4
/
+8
2018-06-01
clk: renesas: Pass clock rate around as 64bit number internally
Marek Vasut
1
-25
/
+31
2018-06-01
clk: renesas: Fix swapped arguments in debug message
Marek Vasut
1
-1
/
+1
2018-05-24
clk: at91: clk-h32mx: replace dm_warn with dev_dbg
Eugen Hristev
1
-1
/
+1
2018-05-14
rockchip: clk: rk3288: handle clk_enable requests for GMAC
Jonathan Gray
1
-0
/
+10
2018-05-14
clk: armada-37xx: Support soc_clk_dump
Marek Behún
2
-1
/
+37
2018-05-14
driver: clk: Add support for clocks on Armada 37xx
Marek Behún
6
-0
/
+631
2018-05-09
clk: Add ICS8N3QV01 driver
Mario Six
3
-0
/
+239
2018-05-08
clk: stm32mp1: Add VREF clock gating
Fabrice Gasnier
1
-0
/
+3
2018-05-08
clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock
Patrice Chotard
1
-11
/
+25
2018-05-07
SPDX: Convert all of our multiple license tags to Linux Kernel style
Tom Rini
1
-2
/
+1
2018-05-07
SPDX: Convert all of our single license tags to Linux Kernel style
Tom Rini
54
-107
/
+54
2018-05-02
clk: renesas: Drop USB extal from the R8A7792 clock driver
Marek Vasut
1
-2
/
+0
2018-04-27
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
Tom Rini
15
-30
/
+0
2018-04-25
rockchip: rv1108: add ofdata_to_platdata() method for driver
Kever Yang
1
-1
/
+9
2018-04-25
rockchip: rk3128: add ofdata_to_platdata() method for driver
Kever Yang
1
-1
/
+10
2018-04-25
rockchip: rk3036: add ofdata_to_platdata() method for driver
Kever Yang
1
-1
/
+10
2018-04-25
rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC
Wadim Egorov
1
-0
/
+13
2018-04-23
clk: uniphier: disable SPL_CLK
Masahiro Yamada
1
-1
/
+0
2018-04-21
clk: renesas: Minor clean up of the R8A7794 clock driver
Marek Vasut
1
-7
/
+3
2018-04-21
clk: renesas: Minor clean up of the R8A7792 clock driver
Marek Vasut
1
-7
/
+3
2018-04-18
Merge git://git.denx.de/u-boot-uniphier
Tom Rini
1
-0
/
+6
2018-04-18
clk: uniphier: add ethernet clock control support
Kunihiko Hayashi
1
-0
/
+6
2018-04-18
clk: fix clk_get_bulk when phandle error
Neil Armstrong
1
-2
/
+2
2018-04-14
clk: renesas: Minor clean up of the R8A7790 clock driver
Marek Vasut
1
-7
/
+3
2018-04-10
clk: add sandbox test for bulk API
Neil Armstrong
1
-0
/
+29
2018-04-10
clk: Add get/enable/disable/release for a bulk of clocks
Neil Armstrong
1
-0
/
+59
2018-04-09
clk: zynqmp: Add new compatible string for clock driver
Michal Simek
1
-0
/
+1
2018-04-07
clock: stm32mp1: add stgen clock source change support
Patrick Delaunay
1
-1
/
+45
2018-03-29
rockchip: clk: rk3188: update dpll settings to make EMAC work
Alexander Kochetkov
1
-1
/
+1
2018-03-23
arm64: zynqmp: Print the value of pl clocks and wdt clock using clk dump
Vipul Kumar
1
-0
/
+75
2018-03-23
clk: zynq: Show watchdog clock rate properly
Michal Simek
1
-1
/
+1
2018-03-19
clk: stm32mp1: add clock tree initialization
Patrick Delaunay
1
-0
/
+576
2018-03-19
clk: add driver for stm32mp1
Patrick Delaunay
3
-0
/
+1166
2018-03-16
clk: at91: clk-system: add set/get_rate operations
Wenyou Yang
1
-0
/
+26
2018-03-16
clk: at91: add PLLADIV driver
Wenyou Yang
2
-1
/
+89
2018-03-16
clk: at91: add USB Host clock driver
Wenyou Yang
3
-0
/
+155
2018-03-14
clk: clk_stm32f: Add DSI clock support
Patrice Chotard
1
-1
/
+1
2018-03-14
clk: clk_stm32f: Add set_rate for LTDC clock
Patrice Chotard
1
-0
/
+100
2018-03-14
clk: clk_stm32f: Configure SAI PLL to generate LTDC pixel clock
Patrice Chotard
1
-1
/
+36
2018-03-14
clk: clk_stm32f: Rework SDMMC stm32_clk_get_rate() part
Patrice Chotard
1
-31
/
+74
2018-03-14
clk: clk_stm32f: No more need of 48Mhz from PLL_SAI
Patrice Chotard
1
-21
/
+8
2018-03-14
clk: clk_stm32f: Fix RCC_PLLSAICFGR mask defines
Patrice Chotard
1
-4
/
+4
2018-03-14
clk: clk_stm32f: Fix stm32_clk_get_rate()
Patrice Chotard
1
-5
/
+7
2018-03-14
board: stm32: switch to DM STM32 timer
Patrice Chotard
1
-15
/
+0
2018-03-14
clk: clk_stm32h7: Fix prescaler for Domain 3
Patrice Chotard
1
-3
/
+4
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