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path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2020-01-16clk: mediatek: fix clock-rate overflow problemSam Shih1-3/+3
2020-01-16clk: mediatek: add driver for MT7622Sam Shih2-0/+679
2020-01-16clk: fixed_rate: add dummy enable() functionChunfeng Yun1-0/+7
2020-01-16clk: add APIs to get (optional) clock by name without a deviceChunfeng Yun1-0/+28
2020-01-16clk: check valid clock by clk_valid()Chunfeng Yun1-8/+8
2020-01-16clk: fix error check for devm_clk_get_optional()Chunfeng Yun1-1/+1
2020-01-16clk: mediatek: mt7629: add support for ssusbsysChunfeng Yun1-0/+42
2020-01-16clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pllmingming lee2-8/+20
2020-01-16clk: mediatek: add set_clr_upd mux type flowmingming lee2-11/+55
2020-01-16clk: mediatek: add driver support for MT8512mingming lee2-0/+874
2020-01-15clk: imx: add i.IMXRT1050 clk driverGiulio Benetti3-0/+310
2020-01-15clk: imx: pfd: add set_rate()Giulio Benetti1-0/+22
2020-01-15clk: imx: pllv3: add support for PLLV3_AV typeGiulio Benetti1-0/+76
2020-01-15clk: imx: pllv3: add PLLV3_SYS supportGiulio Benetti1-0/+53
2020-01-15clk: imx: pllv3: add set_rate() supportGiulio Benetti1-0/+27
2020-01-15clk: imx: pllv3: add disable() supportGiulio Benetti1-0/+16
2020-01-15clk: imx: pllv3: add enable() supportGiulio Benetti1-0/+24
2020-01-15clk: imx: pllv3: set div_mask differently if PLLV3 is GENERIC or USBGiulio Benetti1-0/+2
2020-01-15clk: imx: pllv3: register PLLV3 GENERIC and USB as 2 different clocksGiulio Benetti1-5/+15
2020-01-15clk: imx8qxp: extend to support getting I2C IPG clockAnatolij Gustschin1-0/+12
2020-01-09Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-mpc83xxTom Rini1-1/+4
2020-01-09Merge tag 'dm-pull-8jan20' of git://git.denx.de/u-boot-dmTom Rini1-2/+2
2020-01-09Merge tag 'efi-2020-04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boo...Tom Rini1-0/+1
2020-01-08Merge tag 'u-boot-imx-20200108' of https://gitlab.denx.de/u-boot/custodians/u...Tom Rini4-0/+390
2020-01-08clk: imx: add i.MX8MP clk driverPeng Fan3-0/+380
2020-01-08clk: imx: add imx_clk_mux2_flagsPeng Fan1-0/+10
2020-01-08mpc83xx_clk: always treat MPC83XX_CLK_PCI as invalidRasmus Villemoes1-1/+4
2020-01-08aspeed: ast2500: Read clock ofdata in the correct methodSimon Glass1-2/+2
2020-01-07clk: stm32mp1: Add a clock entry for RNG1 deviceSughosh Ganu1-0/+1
2020-01-07clk: agilex: Add clock driver for AgilexLey Foon Tan3-0/+817
2019-12-09Merge tag 'u-boot-imx-20191209' of https://gitlab.denx.de/u-boot/custodians/u...Tom Rini1-1/+1
2019-12-06clk: imx: imx8mm: Fix the first root clock in imx8mm_ahb_sels[]Frieder Schrempf1-1/+1
2019-12-03clk: mediatek: add driver for MT8518mingming lee2-0/+1559
2019-12-03common: Move get_ticks() function out of common.hSimon Glass1-0/+1
2019-12-03Move strtomhz() to vsprintf.hSimon Glass2-0/+2
2019-11-17rockchip: clk: Add clk driver for rk3308Finley Xiao2-0/+1073
2019-11-17rockchip: clk: pll: add common pll setting funcsElaine Zhang2-0/+361
2019-11-17rockchip: clk: fix wrong CONFIG_IS_ENABLED handlingHeiko Stuebner8-8/+8
2019-11-17rockchip: clk: rv1108: remove duplicate reset initHeiko Stuebner1-14/+2
2019-11-17rockchip: clk: add px30 clock driverKever Yang2-0/+1631
2019-11-12Merge tag 'u-boot-imx-20191105' of https://gitlab.denx.de/u-boot/custodians/u...Tom Rini4-0/+479
2019-11-11Merge tag 'u-boot-rockchip-20191110' of https://gitlab.denx.de/u-boot/custodi...Tom Rini1-0/+2
2019-11-10clk: rockchip: rk3328: Configure CPU clockSimon South1-0/+2
2019-11-08clk: clk-ti-sci: Notify AVS driver upon setting clock rateKeerthy1-0/+5
2019-11-05clk: imx: imx8mm: add set_parent callbackPeng Fan1-0/+19
2019-11-05clk: imx8mm: add enet clkPeng Fan1-0/+27
2019-11-05clk: imx: add i.MX8MN ccf driverPeng Fan3-0/+433
2019-10-30Merge tag 'u-boot-clk-23Oct2019' of https://gitlab.denx.de/u-boot/custodians/...Tom Rini5-23/+279
2019-10-26Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mipsTom Rini3-0/+162
2019-10-25clk: add clock driver for MediaTek MT76x8 platformWeijie Gao3-0/+162
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-22 01:26:12 +0300