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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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drivers
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clk
Age
Commit message (
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)
Author
Files
Lines
2019-08-24
Merge tag 'u-boot-rockchip-20190823' of https://gitlab.denx.de/u-boot/custodi...
Tom Rini
1
-0
/
+12
2019-08-23
rockchip: clk: rk3328: add clk_enable ops for HCLK_HOST0
Kever Yang
1
-0
/
+12
2019-08-22
clk: imx: add i.MX8MM clk driver
Peng Fan
2
-0
/
+417
2019-08-22
clk: imx: add i.MX8M composite clk support
Peng Fan
1
-0
/
+170
2019-08-22
clk: imx: add pll14xx driver
Peng Fan
2
-0
/
+406
2019-08-22
clk: imx: expose CCF entry for all
Peng Fan
2
-2
/
+16
2019-08-22
sandbox: clk: add clk enable/disable test code
Peng Fan
1
-0
/
+15
2019-08-22
clk: prograte clk enable/disable to parent
Peng Fan
1
-6
/
+71
2019-08-22
clk: introduce enable_count
Peng Fan
2
-0
/
+2
2019-08-12
clk: add support for clk_is_match()
Sekhar Nori
1
-0
/
+13
2019-08-10
clk: renesas: Add R8A77980 V3H clock tables
Marek Vasut
3
-0
/
+262
2019-08-07
clk: MediaTek: add hifsys entry for MT7623 SoC.
Ryder Lee
3
-23
/
+51
2019-08-02
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-clk
Tom Rini
12
-14
/
+681
2019-07-31
clk: meson: remove duplicate logic
Heinrich Schuchardt
1
-4
/
+1
2019-07-31
clk: sandbox: add composite clk
Peng Fan
1
-0
/
+80
2019-07-31
clk: gate: support sandbox
Peng Fan
1
-0
/
+11
2019-07-31
clk: add composite clk support
Peng Fan
3
-0
/
+175
2019-07-31
dm: clk: ignore default settings when node not valid
Peng Fan
1
-0
/
+3
2019-07-31
clk: imx: gate2 add set rate
Peng Fan
1
-0
/
+11
2019-07-31
clk: imx: import clk heplers
Peng Fan
1
-0
/
+81
2019-07-31
clk: fixed_rate: export clk_fixed_rate
Peng Fan
1
-7
/
+1
2019-07-31
clk: divider set rate supporrt
Peng Fan
1
-0
/
+88
2019-07-31
clk: add clk-gate support
Peng Fan
2
-1
/
+149
2019-07-31
clk: mux: add set parent support
Peng Fan
1
-2
/
+68
2019-07-31
clk: use clk_dev_binded
Peng Fan
2
-4
/
+6
2019-07-31
clk: introduce clk_dev_binded
Peng Fan
1
-0
/
+8
2019-07-29
Merge tag 'u-boot-rockchip-20190729' of https://gitlab.denx.de/u-boot/custodi...
Tom Rini
1
-0
/
+3
2019-07-29
rockchip: rk3188: init CPU freq in clock driver
Kever Yang
1
-0
/
+3
2019-07-27
Merge tag 'u-boot-imx-20190719' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini
17
-6
/
+1280
2019-07-24
clk: initialize clk->data when using default xlate
Sekhar Nori
1
-0
/
+2
2019-07-23
Merge tag 'u-boot-stm32-20190723' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini
1
-0
/
+9
2019-07-22
clk: stm32mp1: Add RTC clock entry
Patrick Delaunay
1
-0
/
+9
2019-07-21
Merge tag 'rockchip-for-v2019.07' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini
1
-37
/
+51
2019-07-20
clk: rockchip: rk3399: Set 400MHz ddr clock
Jagan Teki
1
-0
/
+4
2019-07-20
clk: rockchip: rk3399: Set 50MHz ddr clock
Jagan Teki
1
-0
/
+4
2019-07-19
clk: sandbox: Add sandbox test code for Common Clock Framework [CCF]
Lukasz Majewski
3
-1
/
+195
2019-07-19
clk: sandbox: Adjust clk-mux.c to emulate reading divider value from HW
Lukasz Majewski
1
-1
/
+9
2019-07-19
clk: sandbox: Adjust clk-divider to emulate reading its value from HW
Lukasz Majewski
1
-1
/
+9
2019-07-19
dm: clk: Extend clk_get_parent_rate() to support CLK_GET_RATE_NOCACHE flag
Lukasz Majewski
1
-2
/
+2
2019-07-19
clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12)
Lukasz Majewski
13
-0
/
+1005
2019-07-19
dm: clk: Define clk_get_by_id() for clk operations
Lukasz Majewski
1
-0
/
+22
2019-07-19
dm: clk: Define clk_get_parent_rate() for clk operations
Lukasz Majewski
1
-0
/
+22
2019-07-19
dm: clk: Define clk_get_parent() for clk operations
Lukasz Majewski
1
-0
/
+16
2019-07-19
clk: Provide struct clk for fixed rate clock (clk_fixed_rate.c)
Lukasz Majewski
1
-0
/
+5
2019-07-19
clk: Remove clock ID check in .get_rate() of clk_fixed_*
Lukasz Majewski
2
-6
/
+0
2019-07-19
clk: sifive: Drop GEMGXL clock driver
Anup Patel
3
-69
/
+0
2019-07-19
clk: sifive: Sync-up main driver with upstream Linux
Anup Patel
1
-36
/
+60
2019-07-19
clk: sifive: Sync-up DT bindings header with upstream Linux
Anup Patel
1
-1
/
+1
2019-07-19
clk: sifive: Sync-up WRPLL library with upstream Linux
Anup Patel
2
-108
/
+83
2019-07-19
clk: sifive: Factor-out PLL library as separate module
Anup Patel
9
-110
/
+11
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