summaryrefslogtreecommitdiff
path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2022-10-11Merge tag 'xilinx-for-v2023.01-rc1-v3' of https://source.denx.de/u-boot/custo...Tom Rini1-1/+1
2022-10-10clk: versal: Mark versal_clock_setup() as staticVenkatesh Yadav Abbarapu1-1/+1
2022-10-09clk: imx: clk-imx8mn add gpmi nand clocksMichael Trimarchi1-0/+14
2022-10-09clk: imx: gate2 support shared counter and relative clock functionsMichael Trimarchi2-5/+37
2022-10-07clk: nuvoton: Add support for NPCM845Jim Liu2-0/+99
2022-09-26Merge tag 'xilinx-for-v2023.01-rc1-v2' of https://gitlab.denx.de/u-boot/custo...Tom Rini2-1/+2
2022-09-26clk: versal: Enable clock driver for Versal NETJay Buddhabhatti2-1/+2
2022-09-23clk: mediatek: add clock driver support for MediaTek MT7981 SoCWeijie Gao2-0/+684
2022-09-23clk: mediatek: add clock driver support for MediaTek MT7986 SoCWeijie Gao2-0/+673
2022-09-23clk: mediatek: add CLK_XTAL support for clock driverWeijie Gao2-1/+6
2022-09-23clk: mediatek: add infrasys clock mux supportWeijie Gao2-1/+74
2022-09-23clk: mediatek: add support to configure clock driver parentWeijie Gao2-33/+48
2022-09-23clk: mediatek: add CLK_BYPASS_XTAL flag to allow bypassing searching clock pa...Weijie Gao2-1/+9
2022-09-20Merge tag 'u-boot-at91-2023.01-a' of https://source.denx.de/u-boot/custodians...Tom Rini1-2/+2
2022-09-19Merge branch 'master' into nextTom Rini9-52/+366
2022-09-19clk: at91: sam9x60: change parent clock from mck_pres to mck_divMihai Sain1-2/+2
2022-09-18clk: imx: Add initial support for i.MXRT1170 clock driverJesse Taube3-0/+238
2022-09-18clk: imx: Add i.MXRT11xx pllv3 variantJesse Taube2-3/+54
2022-09-13clk: aspeed: Get HCLK frequency supportChin-Ting Kuo1-0/+23
2022-09-08Merge tag 'u-boot-stm32-20220907' of https://source.denx.de/u-boot/custodians...Tom Rini1-15/+20
2022-09-06Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini2-11/+11
2022-09-06clk: stm32mp: handle ck_usbo_48m clock provided by USBPHYCPatrick Delaunay1-15/+20
2022-09-06dt-bindings: clock: sifive: sync FU740 PRCI clock binding headerIcenowy Zheng2-11/+11
2022-09-04clk: rockchip: rk3399: Fix Unknown clock 77 on mmc@fe310000Michal Suchanek1-23/+43
2022-07-21treewide: Fix Marek's name and change my e-mail addressMarek BehĂșn2-2/+2
2022-07-18reset: sunxi: Reuse the platform data from the clock driverSamuel Holland1-1/+6
2022-07-18clk: sunxi: Convert driver private data to platform dataSamuel Holland1-17/+24
2022-07-18clk: sunxi: Use a single driver for all variantsSamuel Holland16-276/+137
2022-07-18reset: sunxi: Get the reset count from the CCU descriptorSamuel Holland16-95/+20
2022-07-18clk: sunxi: Prevent out-of-bounds gate array accessSamuel Holland1-2/+5
2022-07-18clk: sunxi: Store the array sizes in the CCU descriptorSamuel Holland15-0/+32
2022-07-14clk: mtmips: add clock driver for MediaTek MT7621 SoCWeijie Gao2-0/+289
2022-07-11Merge branch 'next'Tom Rini11-30/+95
2022-07-06clk/ast2500: Add SD clockJoel Stanley1-0/+23
2022-07-06clk/ast2600: Adjust eMMC clock namesJoel Stanley1-2/+2
2022-07-06clk/aspeed: Add debug message when clock failsJoel Stanley2-2/+5
2022-07-01drivers: clk: Update license for Intel N5X deviceTeik Heng Chong4-8/+8
2022-06-26clk: sunxi: Add additional RTC compatible stringsSamuel Holland1-0/+2
2022-06-23clk: scmi: support SCMI multi-channelEtienne Carriere1-7/+26
2022-06-23firmware: scmi: prepare scmi uclass API to multi-channelEtienne Carriere1-5/+5
2022-06-20Merge branch 'master' into nextTom Rini1-4/+4
2022-06-17clk: Add directory for STM32 clock driversPatrick Delaunay7-19/+33
2022-06-14clk: imx8mp: use usb_core_ref for usb_root_clkAndrey Zhizhikin1-1/+1
2022-06-14clk: imx8mp: fix root clock names for ecspiAndrey Zhizhikin1-3/+3
2022-06-10arm: mach-k3: am62: Introduce autogenerated SoC dataSuman Anna1-0/+6
2022-05-24clk: sunxi: add and use dummy gate clocksAndre Przywara4-0/+9
2022-05-24clk: sunxi: add PIO bus gate clocksAndre Przywara12-0/+28
2022-05-24clk: sunxi: h6_r: Correct the driver nameSamuel Holland1-2/+2
2022-05-23clk: sunxi: implement clock driver for suniv f1c100sGeorge Hilliard3-0/+82
2022-05-10clk: stm32mp1: Add missing newlineMarek Vasut1-1/+1