starfive-tech/u-boot.git - StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2019-04-24	Merge tag 'u-boot-amlogic-20190423' of git://git.denx.de/u-boot-amlogic	Tom Rini	8	-1/+349
2019-04-24	clk: mediatek: add driver for MT8516	Fabien Parent	2	-0/+803
2019-04-24	clk: mediatek: add support for SETCLR_INV and NO_SETCLR flags	Fabien Parent	1	-0/+12
2019-04-23	clk: meson: add g12a support	Jerome Brunet	3	-0/+324
2019-04-23	clk: create meson directory and move related drivers	Jerome Brunet	7	-1/+25
2019-04-17	Merge branch 'master' of git://git.denx.de/u-boot-sunxi	Tom Rini	1	-1/+2
2019-04-16	clk: sunxi: r40: Fix GMAC reset reg offset	Jagan Teki	1	-1/+2
2019-04-16	ARM: zynq: Add missing i2c get_rate for fixing i2c SPL	Hannes Schmelzer	1	-0/+2
2019-04-13	Merge tag 'pull-12apr19' of git://git.denx.de/u-boot-dm	Tom Rini	2	-2/+3
2019-04-12	Merge tag 'u-boot-stm32-20190412' of https://github.com/patrickdelaunay/u-boot	Tom Rini	1	-0/+2
2019-04-12	stm32mp1: add trusted boot with TF-A	Patrick Delaunay	1	-0/+2
2019-04-12	clk: socfpga: replace dm_fdt_pre_reloc by dm_ofnode_pre_reloc	Patrick Delaunay	1	-1/+2
2019-04-12	clk: at91: replace dm_fdt_pre_reloc by dm_ofnode_pre_reloc	Patrick Delaunay	1	-1/+1
2019-04-09	clk: renesas: Synchronize Gen3 tables with Linux 5.0	Marek Vasut	8	-130/+215
2019-04-09	clk: renesas: Synchronize Gen2 tables with Linux 5.0	Marek Vasut	4	-16/+14
2019-04-09	clk: renesas: Add R8A77965 clock tables	Marek Vasut	4	-19/+346
2019-04-01	clk: sunxi: a10: Add CLK_AHB_GMAC	Jagan Teki	1	-0/+2
2019-03-25	clk: renesas: Add support for setting MMCIF clock divider on Gen2	Marek Vasut	1	-0/+42
2019-03-25	clk: renesas: Fix swapped div and mul in debug output on Gen2	Marek Vasut	1	-1/+1
2019-03-25	clk: renesas: Fix SDH clock divider decoding on Gen2	Marek Vasut	1	-5/+9
2019-03-09	clk: sunxi: h3: Implement EPHY CLK and RESET	Jagan Teki	1	-0/+4
2019-03-09	clk: sunxi: Implement EMAC, GMAC clocks, resets	Jagan Teki	6	-0/+15
2019-03-09	clk: sunxi: Implement A10 EMAC clocks	Jagan Teki	2	-0/+2
2019-03-04	clk: sunxi: Implement SPI clocks, resets	Jagan Teki	11	-0/+97
2019-03-01	Merge branch 'master' of git://git.denx.de/u-boot-sh	Tom Rini	1	-10/+0
2019-02-27	clk: Add fixed-factor clock driver	Anup Patel	2	-1/+77
2019-02-27	clk: Add SiFive FU540 PRCI clock driver	Anup Patel	7	-0/+1121
2019-02-25	clk: rmobile: Drop def_bool per SoC	Marek Vasut	1	-10/+0
2019-02-09	clk: stm32mp1: correctly handle Clock Spreading Generator	Patrick Delaunay	1	-1/+7
2019-02-09	clk: stm32mp1: add debug information	Patrick Delaunay	1	-4/+79
2019-02-09	clk: stm32mp1: recalculate counter when switching freq	Patrick Delaunay	1	-2/+7
2019-02-09	clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRR	Patrick Delaunay	1	-8/+5
2019-02-09	clk: stm32mp1: add IPCC clock	Patrick Delaunay	1	-0/+1
2019-02-09	clk: stm32mp1: no more get ck_usbo_48m in device tree	Patrick Delaunay	1	-3/+3
2019-02-01	rockchip: clk: Add mention of four new clocks	Simon Glass	1	-0/+12
2019-02-01	clk: Improve debug message in clk_set_default_rates()	Simon Glass	1	-2/+2
2019-02-01	rockchip: rk3288: Add i2s pinctrl and clock support	Simon Glass	1	-0/+48
2019-01-30	sunxi: clk: enable clk and reset for CCU devices	Andre Przywara	1	-0/+12
2019-01-29	sunxi: clk: A80: add MMC clock support	Andre Przywara	1	-1/+27
2019-01-29	sunxi: clk: add MMC gates/resets	Andre Przywara	11	-0/+63
2019-01-18	clk: sunxi: Add Allwinner A80 CLK driver	Jagan Teki	3	-0/+65
2019-01-18	clk: sunxi: Add Allwinner H6 CLK driver	Jagan Teki	3	-0/+61
2019-01-18	clk: sunxi: Implement UART resets	Jagan Teki	7	-0/+43
2019-01-18	clk: sunxi: Implement UART clocks	Jagan Teki	9	-0/+57
2019-01-18	clk: sunxi: Add Allwinner V3S CLK driver	Jagan Teki	3	-0/+59
2019-01-18	clk: sunxi: Add Allwinner R40 CLK driver	Jagan Teki	3	-0/+78
2019-01-18	clk: sunxi: Add Allwinner A83T CLK driver	Jagan Teki	3	-0/+71
2019-01-18	clk: sunxi: Add Allwinner A23/A33 CLK driver	Jagan Teki	3	-0/+71
2019-01-18	clk: sunxi: Add Allwinner A31 CLK driver	Jagan Teki	3	-0/+76
2019-01-18	clk: sunxi: Add Allwinner A10s/A13 CLK driver	Jagan Teki	3	-0/+64