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JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
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StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
crypto
/
fsl
/
jr.h
Age
Commit message (
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Author
Files
Lines
2021-04-08
crypto: fsl: refactor for 32 bit version CAAM support on ARM64
Ye Li
1
-5
/
+5
2021-04-08
crypto: caam: Fix pointer size to 32bit for i.MX8M
Aymen Sghaier
1
-3
/
+4
2021-04-08
crypto: caam: change JR running loop
Franck LENORMAND
1
-2
/
+2
2019-06-11
Revert "drivers/crypto/fsl: assign job-rings to non-TrustZone"
Breno Matheus Lima
1
-2
/
+0
2018-05-07
SPDX: Convert all of our single license tags to Linux Kernel style
Tom Rini
1
-2
/
+1
2018-02-09
crypto/fsl: instantiate all rng state handles
Lukas Auer
1
-0
/
+2
2018-02-04
drivers/crypto/fsl: assign job-rings to non-TrustZone
Bryan O'Donoghue
1
-0
/
+2
2016-05-18
crypto/fsl: add support for multiple SEC engines initialization
Alex Porosanu
1
-0
/
+3
2016-03-29
crypto/fsl: Make CAAM transactions cacheable
Saksham Jain
1
-0
/
+3
2016-02-24
drivers/crypto/fsl : Allocate output ring with size aligned to CACHELNE SIZE
Ruchika Gupta
1
-0
/
+2
2015-10-29
crypto/fsl: SEC driver cleanup for 64 bit and endianness
Aneesh Bansal
1
-4
/
+3
2015-08-03
drivers/crypto/fsl: fix snooping for write transactions
horia.geanta@freescale.com
1
-0
/
+2
2014-10-17
fsl_sec: Add hardware accelerated SHA256 and SHA1
Ruchika Gupta
1
-0
/
+97