starfive-tech/u-boot.git - StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2019-04-17	ddr: altera: Stratix10: Add ECC memory scrubbing	Ley Foon Tan	1	-0/+81
2019-04-17	ddr: altera: Stratix10: Add multi-banks DRAM size check	Ley Foon Tan	1	-5/+41
2019-04-17	ddr: altera: stratix10: Move SDRAM size check to SDRAM driver	Ley Foon Tan	1	-0/+15
2019-04-17	arm: socfpga: move gen5 SDR driver to DM	Simon Goldschmidt	4	-16/+173
2019-03-10	ddr: socfpga: Clean up ddr_setup()	Marek Vasut	1	-28/+15
2019-03-10	ddr: socfpga: Clean up EMIF reset	Marek Vasut	1	-26/+7
2019-03-10	ddr: socfpga: Fix EMIF clear timeout	Marek Vasut	1	-14/+11
2019-03-09	ddr: socfpga: Fix newline in debug print on A10	Marek Vasut	1	-1/+1
2019-03-09	ddr: socfpga: Fix IO in Arria10 DDR driver	Marek Vasut	1	-3/+3
2018-09-15	socfpga: stratix10: fix sdram_calculate_size	Dalon Westergreen	1	-2/+2
2018-07-12	ddr: altera: Add ECC DRAM scrubbing support for Arria10	Marek Vasut	1	-0/+27
2018-07-12	ddr: altera: Drop custom dram_bank_mmu_setup() on Arria10	Marek Vasut	1	-25/+0
2018-07-12	ddr: altera: stratix10: Add DDR support for Stratix10 SoC	Ley Foon Tan	2	-0/+389
2018-05-20	SPDX: Fixup SPDX tags in a few new files	Tom Rini	1	-2/+1
2018-05-18	configs: Add DDR Kconfig support for Arria 10	Tien Fong Chee	1	-1/+1
2018-05-18	ARM: socfpga: Add DDR driver for Arria 10	Tien Fong Chee	2	-0/+742
2018-05-18	ARM: socfpga: Rename the gen5 sdram driver to more specific name	Tien Fong Chee	2	-1/+1
2018-05-07	SPDX: Convert all of our single license tags to Linux Kernel style	Tom Rini	4	-9/+4
2018-04-27	Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR	Tom Rini	1	-2/+0
2018-01-25	ddr: altera: silence PHY calibration unless in debug mode	Goldschmidt Simon	1	-4/+4
2017-04-14	arm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig	Ley Foon Tan	2	-1/+8
2016-10-27	ddr: altera: Configuring SDRAM extra cycles timing parameters	Chin Liang See	1	-0/+3
2016-04-20	ddr: altera: Repair DQ window centering code	Marek Vasut	1	-8/+7
2016-04-20	ddr: altera: Staticize global variables	Marek Vasut	1	-4/+4
2016-04-20	ddr: altera: Make DLEVEL behavior inclusive	Marek Vasut	1	-66/+66
2016-04-20	ddr: altera: Zero DM IN delay in scc_mgr_zero_group()	Marek Vasut	1	-3/+13
2016-04-20	ddr: altera: Remove unnecessary ODT mode config	Marek Vasut	1	-1/+0
2016-04-20	ddr: altera: Remove unnecessary update of the SCC	Marek Vasut	1	-1/+0
2016-04-20	ddr: altera: Fix DRAM end value in protection rule	Marek Vasut	1	-1/+1
2016-04-20	ddr: altera: Fix scc_mgr_set() argument order	Marek Vasut	1	-1/+1
2016-04-20	ddr: altera: Tweak DQS tracking enable handling	Marek Vasut	1	-2/+5
2016-04-20	ddr: altera: Replace ad-hoc constant with macro	Marek Vasut	1	-2/+2
2016-01-16	ddr: altera: Init the rule ID in debug code	Marek Vasut	1	-0/+1
2015-08-23	ddr: altera: Repair uninited variable	Marek Vasut	1	-1/+1
2015-08-23	ddr: altera: Replace float multiplication with integer one	Marek Vasut	1	-1/+1
2015-08-08	ddr: altera: sequencer: Clean checkpatch issues	Marek Vasut	1	-71/+88
2015-08-08	ddr: altera: sequencer: Clean data types	Marek Vasut	1	-48/+48
2015-08-08	ddr: altera: sequencer: Pluck out misc macros from code	Marek Vasut	1	-22/+15
2015-08-08	ddr: altera: sequencer: Zap SEQ_T(INIT\|RESET)_CNTR._VAL	Marek Vasut	2	-49/+4
2015-08-08	ddr: altera: sequencer: Zap VFIFO_SIZE	Marek Vasut	2	-7/+4
2015-08-08	ddr: altera: sequencer: Wrap misc remaining macros	Marek Vasut	1	-0/+2
2015-08-08	ddr: altera: sequencer: Pluck out IO_* macros from code	Marek Vasut	1	-101/+100
2015-08-08	ddr: altera: sequencer: Wrap IO_* macros	Marek Vasut	1	-0/+2
2015-08-08	ddr: altera: sequencer: Pluck out RW_MGR_* macros from code	Marek Vasut	2	-154/+154
2015-08-08	ddr: altera: sequencer: Wrap RW_MGR_* macros	Marek Vasut	1	-0/+4
2015-08-08	ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_init	Marek Vasut	1	-6/+8
2015-08-08	ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKS	Marek Vasut	1	-1/+0
2015-08-08	ddr: altera: sequencer: Zap unused params and macros	Marek Vasut	2	-75/+5
2015-08-08	ddr: altera: sequencer: Move qts-generated files to board dir	Marek Vasut	5	-605/+9
2015-08-08	ddr: altera: sdram: Make sdram_start and sdram_end into u32	Marek Vasut	1	-11/+12