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2021-09-30WS cleanup: remove SPACE(s) followed by TABWolfgang Denk1-9/+9
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-01nxp: Migrate a number of DDR related symbols to KconfigTom Rini1-0/+21
- Guard most of the options in drivers/ddr/fsl/Kconfig with SYS_FSL_DDR || SYS_FSL_MMDC. - Migrate FSL_DMA, DDR_ECC, DDR_ECC_CMD, and ECC_INIT_VIA_DDRCONTROLLER to Kconfig. - Clean up the logic for including the DDR_ECC_CMD code. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-01ddr: Migrate DDR_SPD to KconfigTom Rini1-0/+4
Move the symbol that controls building some JEDEC SPD support functions to Kconfig. This is required on the TI keystone 2 platforms and very frequently (but not always) used on large number of Freescale/NXP platforms, so use imply there. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-08ppc: Remove T4160RDB boardTom Rini1-2/+1
This board has not been converted to CONFIG_DM_PCI by the deadline and is also missing conversion to CONFIG_DM. Remove it. As this is the last ARCH_T4160 platform, remove that support as well. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-08ppc: Remove sbc8641d boardTom Rini3-95/+2
This board has not been converted to CONFIG_DM_PCI by the deadline and is also missing conversion to CONFIG_DM. Remove it. This is also the last of the ARCH_MPC8641/MPC8610 platforms, so remove that support as well. Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-08ppc: Remove xpedite boardsTom Rini1-1/+0
These boards have not been converted to CONFIG_DM_PCI by the deadline and is also missing conversion to CONFIG_DM. Remove them. As this includes the last ARCH_MPC8572 platform, remove that as well. Cc: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Peter Tyser <ptyser@xes-inc.com>
2021-07-08ppc: Remove MPC8555CDS boardsTom Rini2-19/+4
These boards have not been converted to CONFIG_DM_PCI by the deadline and is also missing conversion to CONFIG_DM. Remove them. As this is the only ARCH_MPC8555 platform left, remove that support as well. Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-08ppc: Remove MPC8541CDS boardTom Rini2-2/+2
This board has not been converted to CONFIG_DM_PCI by the deadline and is also missing conversion to CONFIG_DM. Remove it. As this is the only MPC8541 target left, remove that architecture support as well. Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10ppc: Remove Cyrus_P5020 and P5040 boardsTom Rini1-1/+0
These boards have not been converted to CONFIG_DM_MMC by the deadline. Remove them. As the P5020 is the last ARCH_P5020 platform, remove that support as well. Cc: Andy Fleming <afleming@gmail.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-21dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIOIgor Opaniuk1-4/+4
Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10armv8: lx2162a: Add Soc changes to support LX2162AMeenakshi Aggarwal1-0/+1
LX2162 is LX2160 based SoC, it has same die as of LX2160 with different packaging. LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module, microSD card, eMMC support, serial console, qspi nor flash, qsgmii, sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes interface to support three PCIe gen3 interface. Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> [Fixed whitespace errors] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-10-22common: rename getc() to getchar()Heinrich Schuchardt1-1/+1
The sandbox is built with the SDL2 library with invokes the X11 library which in turn calls getc(). But getc() in glibc is defined as int getc(FILE *) This does not match our definition. int getc(void) The sandbox crashes when called with parameter -l. Rename our library symbol getc() to getchar(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-04ddr: Rework errata A008109, A008378, 009942 workaroundJaiprakash Singh3-65/+107
Move errata A008109, A008378, 009942 workaround implementation from compute_fsl_memctl_config_regs() to fsl_ddr_set_memctl_regs() and add register write after each workaround implementation. Signed-off-by: Jaiprakash Singh <Jaiprakash.singh@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04ddr: fsl: Impl. Erratum A008109Joakim Tjernlund2-0/+9
Impl. erratum as descibed in errata doc. Enable A008109 for T1040 and T1024 Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19common: Drop linux/bitops.h from common headerSimon Glass6-0/+6
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop linux/delay.h from common headerSimon Glass8-0/+8
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop linux/bug.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop log.h from common headerSimon Glass15-0/+15
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19command: Remove the cmd_tbl_t typedefSimon Glass1-0/+1
We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop init.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-10Revert "mpc85xx: ddr: Always start DDR RAM in Self Refresh mode"Biwen Li1-6/+7
This reverts commit 2a5d5d27edfbdb0e02a7fcf05569f92c02ae44ee. The commit breaks uboot boot (hang in ddr init) on many PowerPC boards like P3041DS, P4080DS Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-23mpc85xx: ddr: Always start DDR RAM in Self Refresh modeJoakim Tjernlund1-7/+6
Some of t1042 boards fails DDR init with an Automatic calibration error every now and then. Investigations revealed that true Warm boots never failed. Warm boots has some extra steps performed, one being to start DDRC in Self Refresh and then clearing SR right after. Applying this SR method unconditionally made all our boards stable again, regardless of Cold/Warm boot. Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-08-26ddr, fsl: add DM_I2C supportHeiko Schocher1-43/+76
add DM_I2C support for this driver. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22boards: lx2160a: Add support of I2C driver modelChuanhua Han1-1/+35
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C API when DM_I2C is used. When DM_I2C_COMPAT is not enabled for compilation, a compilation error will be generated. This patch solves the problem that the i2c-related api of the lx2160a platform does not support dm. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-11env: Move env_get_f() to env.hSimon Glass3-0/+3
Move this function over to the new header file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-21mpc83xx: Get rid of CONFIG_SYS_DDR_SDRAM_BASEMario Six1-0/+4
CONFIG_SYS_DDR_SDRAM_BASE is set to the same value as CONFIG_SYS_SDRAM_BASE on all existing boards. Just use CONFIG_SYS_SDRAM_BASE instead. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-03-03configs: fsl: move DDR specific defines to KconfigRajesh Bhagat1-0/+12
Moves below DDR specific defines to Kconfig: CONFIG_FSL_DDR_BIST CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE CONFIG_FSL_DDR_INTERACTIVE CONFIG_FSL_DDR_SYNC_REFRESH Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19drivers/ddr/fsl: Update fsl_ddr_board_options as weak functionPriyanka Jain1-3/+6
fsl_ddr_board_options is generally defined in board board's ddr.c, but some boards like lx2160ardb board does not need this function. Defining fsl_ddr_board_options as weak function to resolve compilation errors for such boards. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> [PK: Fix checkpatch warnings] Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2018-12-07armv8: lx2160a: Add LX2160A SoC SupportPriyanka Jain1-0/+1
LX2160A Soc is based on Layerscape Chassis Generation 3.2 architecture with features: 16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC, 2 64-bit DDR4 memory controller, RGMII, 8 I2C controllers, 3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs, 4 TZASC instances, etc. SoC personalites: LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-07-26drivers/ddr/fsl: fix '__hwconfig without a buffer' messagesJeremy Gebben1-8/+6
Pass an empty buffer instead of NULL if the hwconfig environment variable isn't set. Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com> Cc: Stefano Babic <sbabic@denx.de> Cc: York Sun <york.sun@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini18-37/+18
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini1-2/+0
We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-15Revert "drivers/ddr/fsl: Dual-license DDR driver"Tom Rini17-17/+17
Upon further review, not all code authors are in favour of this change. This reverts commit ee3556bcafbb05e59aabdc31368984e76acaabc4. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-09drivers/ddr/fsl: Dual-license DDR driverYork Sun17-17/+17
To make this driver easier to be reused, dual-license DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Simon Glass <sjg@chromium.org> CC: Tom Rini <trini@konsulko.com> CC: Heinrich Schuchardt <xypron.glpk@gmx.de> CC: Thomas Schaefer <thomas.schaefer@kontron.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Robert P. J. Day <rpjday@crashcourse.ca> CC: Alexander Merkle <alexander.merkle@lauterbach.com> CC: Joakim Tjernlund <joakim.tjernlund@transmode.se> CC: Curt Brune <curt@cumulusnetworks.com> CC: Valentin Longchamp <valentin.longchamp@keymile.com> CC: Wolfgang Denk <wd@denx.de> CC: Anatolij Gustschin <agust@denx.de> CC: Ira W. Snyder <iws@ovro.caltech.edu> CC: Marek Vasut <marek.vasut@gmail.com> CC: Kyle Moffett <Kyle.D.Moffett@boeing.com> CC: Sebastien Carlier <sebastien.carlier@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Peter Tyser <ptyser@xes-inc.com> CC: Paul Gortmaker <paul.gortmaker@windriver.com> CC: Peter Tyser <ptyser@xes-inc.com> CC: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2018-01-30drivers/ddr/fsl: Cleanup unused variableYork Sun5-5/+0
Variable "row_density" is no longer used. Drop it from DIMM structure. Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30drivers/ddr/fsl: Modify binding registers to save time on data initYork Sun1-11/+49
DDR controllers always use binding register to determine the memory space to perform data initialization. In case of controller interleaving, the space is doubled, resulting twice long wait. It wasn't too bad until the memory capacity increases. To reduce the wait time, reduce the binding space to half and restore it after data initialization. Three-way interleaving is no longer used and is removed. Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30drivers/ddr/fsl: Add calculation of register control wordsYork Sun3-7/+48
DDR4 RDIMM has some information in SPD to be used to calculate the control words for register chip. The rest can be found from JEDEC spec DDR4RCD02. Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30drivers/ddr/fsl: Add 3DS RDIMM supportYork Sun5-14/+80
On top of RDIMM support, add new register calculation to support 3DS RDIMMs. Only symmetrical 3DS is supported at this time. Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30drivers/ddr/fsl: Fix workaround for A009803York Sun1-1/+1
Wrong field was masked in this workaround due to wrong endianness. The impacted SoCs have big-endian. Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30drivers/ddr/fsl: Fix DDR4 RDIMM supportYork Sun3-22/+40
For DDR4, command/address delay in mode registers and parity latency in timing config register are only needed for UDIMMs, but not RDIMMs. Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix calculation of timing config registers. Use hexadecimal format for printing RCW (register control word) registers. Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-23ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCsRajesh Bhagat1-1/+3
Sets DDR configuration parameter cdr1 before all other settings to support case 0.9v VDD is enabled for some SoCs Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv8: ls1088a: Add NXP LS1088A SoC supportAshish Kumar1-1/+1
LS1088A is compliant with the Layerscape Chassis Generation 3 with eight ARM v8 Cortex-A53 cores in 2 cluster, CCI-400, one 64-bit DDR4 SDRAM memory controller with ECC, Data path acceleration architecture 2.0 (DPAA2), Ethernet interfaces (SGMIIs, RGMIIs, QSGMIIs, XFIs), QSPI, IFC, PCIe, SATA, USB, SDXC, DUARTs etc. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> [YS: Revised commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-16env: Rename getenv/_f() to env_get()Simon Glass3-8/+8
We are now using an env_ prefix for environment functions. Rename these two functions for consistency. Also add function comments in common.h. Quite a few places use getenv() in a condition context, provoking a warning from checkpatch. These are fixed up in this patch also. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-12driver: ddr: fsl: Fix compiling error for DDR2York Sun1-0/+4
Fix compiling error of "no member named 'taamin_ps'" for DDR2. Signed-off-by: York Sun <york.sun@nxp.com>
2017-06-05common: arm: freescale: layerscape: Move header files out of common.hSimon Glass4-4/+8
We should not have an arch-specific header file in common.h. Adjust the board files a little so it is not needed, and drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05common: freescale: Move arch-specific declarationsSimon Glass5-0/+13
The declarations should not be in common.h. Move them to the arch-specific headers. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-18Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini1-36/+36
2017-04-18ddr: fsl: incorrect logical constraint in populate_memctl_optionsxypron.glpk@gmx.de1-1/+1
(pdimm[0].data_width >= 32) || (pdimm[0].data_width <= 40) is always true. We should use && here. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17drivers: ddr: fsl: fix unused-const-variable warningsThomas Schaefer1-36/+36
Depending on DDR configuration, gcc-6.x will show up unused-const- variable messages. Use __maybe_unused specifier for all dynamic_odt variable definitions to remove these warnings. Memory footprint will not increase as gcc will optimize out unused constants. Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com> Signed-off-by: York Sun <york.sun@nxp.com>
2017-04-13board_f: Rename initdram() to dram_init()Simon Glass1-2/+2
This allows us to use the same DRAM init function on all archs. Add a dummy function for arc, which does not use DRAM init here. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Dummy function on nios2] Signed-off-by: Tom Rini <trini@konsulko.com>