summaryrefslogtreecommitdiff
path: root/drivers/ddr/fsl
AgeCommit message (Expand)AuthorFilesLines
2019-03-03configs: fsl: move DDR specific defines to KconfigRajesh Bhagat1-0/+12
2019-02-19drivers/ddr/fsl: Update fsl_ddr_board_options as weak functionPriyanka Jain1-3/+6
2018-12-07armv8: lx2160a: Add LX2160A SoC SupportPriyanka Jain1-0/+1
2018-07-26drivers/ddr/fsl: fix '__hwconfig without a buffer' messagesJeremy Gebben1-8/+6
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini18-37/+18
2018-04-27Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini1-2/+0
2018-02-15Revert "drivers/ddr/fsl: Dual-license DDR driver"Tom Rini17-17/+17
2018-02-09drivers/ddr/fsl: Dual-license DDR driverYork Sun17-17/+17
2018-01-30drivers/ddr/fsl: Cleanup unused variableYork Sun5-5/+0
2018-01-30drivers/ddr/fsl: Modify binding registers to save time on data initYork Sun1-11/+49
2018-01-30drivers/ddr/fsl: Add calculation of register control wordsYork Sun3-7/+48
2018-01-30drivers/ddr/fsl: Add 3DS RDIMM supportYork Sun5-14/+80
2018-01-30drivers/ddr/fsl: Fix workaround for A009803York Sun1-1/+1
2018-01-30drivers/ddr/fsl: Fix DDR4 RDIMM supportYork Sun3-22/+40
2018-01-23ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCsRajesh Bhagat1-1/+3
2017-09-11armv8: ls1088a: Add NXP LS1088A SoC supportAshish Kumar1-1/+1
2017-08-16env: Rename getenv/_f() to env_get()Simon Glass3-8/+8
2017-06-12driver: ddr: fsl: Fix compiling error for DDR2York Sun1-0/+4
2017-06-05common: arm: freescale: layerscape: Move header files out of common.hSimon Glass4-4/+8
2017-06-05common: freescale: Move arch-specific declarationsSimon Glass5-0/+13
2017-04-18Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini1-36/+36
2017-04-18ddr: fsl: incorrect logical constraint in populate_memctl_optionsxypron.glpk@gmx.de1-1/+1
2017-04-17drivers: ddr: fsl: fix unused-const-variable warningsThomas Schaefer1-36/+36
2017-04-13board_f: Rename initdram() to dram_init()Simon Glass1-2/+2
2017-04-05board_f: Drop return value from initdram()Simon Glass1-0/+2
2017-01-05ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLSYork Sun9-64/+64
2017-01-05ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to KconfigYork Sun1-0/+14
2017-01-05powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun1-0/+15
2017-01-05arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun1-0/+21
2017-01-05fsl_ddr: Move DDR config options to driver KconfigYork Sun2-1/+123
2016-12-05fsl/ddr: Add erratum_a009942_check_cpo and clean related erratumShengzhou Liu3-31/+134
2016-12-05fsl/ddr: Fix compiling warningShengzhou Liu1-32/+25
2016-11-24powerpc: MPC8555: Remove macro CONFIG_MPC8555York Sun2-2/+2
2016-11-24powerpc: mpc8541: Remove macro CONFIG_MPC8541York Sun2-2/+2
2016-09-27Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini4-40/+213
2016-09-26driver: ddr: fsl_mmdc: Pass board parameters through data structureYork Sun1-19/+19
2016-09-24drivers: squash lines for immediate returnMasahiro Yamada2-20/+4
2016-09-15ddr: fsl: fix a compile issueShaohui Xie1-1/+6
2016-09-15driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012aShengzhou Liu2-0/+157
2016-09-15driver/ddr/fsl: Revise workaround A008511 for A009803York Sun1-36/+47
2016-09-15driver/ddr/fsl: Add more debug registersYork Sun2-3/+3
2016-08-02driver/ddr/fsl: Fix timing_cfg_2York Sun1-1/+1
2016-07-16Various, unrelated tree-wide typo fixes.Robert P. J. Day1-1/+1
2016-06-04driver/ddr/fsl: Check condition for erratum A-009803Shengzhou Liu1-19/+23
2016-06-04drivers/ddr/fsl: Disabling data init if ECC is not enabledYork Sun1-1/+2
2016-06-04drivers/ddr/fsl: Fix timing_cfg_2 registerYork Sun1-1/+1
2016-06-04drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntlShengzhou Liu1-2/+9
2016-05-18driver/ddr/fsl: Add workaround for erratum A-010165Shengzhou Liu1-1/+9
2016-05-17driver/ddr/fsl: Add workaround for erratum A-009801Shengzhou Liu1-0/+7
2016-05-17drivers/ddr/fsl: update workaround for erratum A-008511Shengzhou Liu1-3/+7
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-09 23:46:40 +0300