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Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
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JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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drivers
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ddr
Age
Commit message (
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)
Author
Files
Lines
2017-01-05
ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS
York Sun
9
-64
/
+64
2017-01-05
ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to Kconfig
York Sun
1
-0
/
+14
2017-01-05
powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig
York Sun
1
-0
/
+15
2017-01-05
arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig
York Sun
1
-0
/
+21
2017-01-05
fsl_ddr: Move DDR config options to driver Kconfig
York Sun
2
-1
/
+123
2016-12-05
fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum
Shengzhou Liu
3
-31
/
+134
2016-12-05
fsl/ddr: Fix compiling warning
Shengzhou Liu
1
-32
/
+25
2016-11-24
powerpc: MPC8555: Remove macro CONFIG_MPC8555
York Sun
2
-2
/
+2
2016-11-24
powerpc: mpc8541: Remove macro CONFIG_MPC8541
York Sun
2
-2
/
+2
2016-10-27
ddr: altera: Configuring SDRAM extra cycles timing parameters
Chin Liang See
1
-0
/
+3
2016-10-07
Various, accumulated typos collected from around the tree.
Robert P. J. Day
1
-1
/
+1
2016-09-27
Merge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini
4
-40
/
+213
2016-09-26
driver: ddr: fsl_mmdc: Pass board parameters through data structure
York Sun
1
-19
/
+19
2016-09-24
drivers: squash lines for immediate return
Masahiro Yamada
3
-25
/
+5
2016-09-15
ddr: fsl: fix a compile issue
Shaohui Xie
1
-1
/
+6
2016-09-15
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a
Shengzhou Liu
2
-0
/
+157
2016-09-15
driver/ddr/fsl: Revise workaround A008511 for A009803
York Sun
1
-36
/
+47
2016-09-15
driver/ddr/fsl: Add more debug registers
York Sun
2
-3
/
+3
2016-08-02
driver/ddr/fsl: Fix timing_cfg_2
York Sun
1
-1
/
+1
2016-07-16
Various, unrelated tree-wide typo fixes.
Robert P. J. Day
1
-1
/
+1
2016-06-04
driver/ddr/fsl: Check condition for erratum A-009803
Shengzhou Liu
1
-19
/
+23
2016-06-04
drivers/ddr/fsl: Disabling data init if ECC is not enabled
York Sun
1
-1
/
+2
2016-06-04
drivers/ddr/fsl: Fix timing_cfg_2 register
York Sun
1
-1
/
+1
2016-06-04
drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl
Shengzhou Liu
1
-2
/
+9
2016-05-24
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Tom Rini
1
-4
/
+23
2016-05-20
arm: mvebu: a38x: Weed out floating point use
Marek Vasut
1
-19
/
+10
2016-05-18
driver/ddr/fsl: Add workaround for erratum A-010165
Shengzhou Liu
1
-1
/
+9
2016-05-17
driver/ddr/fsl: Add workaround for erratum A-009801
Shengzhou Liu
1
-0
/
+7
2016-05-17
drivers/ddr/fsl: update workaround for erratum A-008511
Shengzhou Liu
1
-3
/
+7
2016-05-03
Fix spelling of "occurred".
Vagrant Cascadian
2
-2
/
+2
2016-04-20
ddr: altera: Repair DQ window centering code
Marek Vasut
1
-8
/
+7
2016-04-20
ddr: altera: Staticize global variables
Marek Vasut
1
-4
/
+4
2016-04-20
ddr: altera: Make DLEVEL behavior inclusive
Marek Vasut
1
-66
/
+66
2016-04-20
ddr: altera: Zero DM IN delay in scc_mgr_zero_group()
Marek Vasut
1
-3
/
+13
2016-04-20
ddr: altera: Remove unnecessary ODT mode config
Marek Vasut
1
-1
/
+0
2016-04-20
ddr: altera: Remove unnecessary update of the SCC
Marek Vasut
1
-1
/
+0
2016-04-20
ddr: altera: Fix DRAM end value in protection rule
Marek Vasut
1
-1
/
+1
2016-04-20
ddr: altera: Fix scc_mgr_set() argument order
Marek Vasut
1
-1
/
+1
2016-04-20
ddr: altera: Tweak DQS tracking enable handling
Marek Vasut
1
-2
/
+5
2016-04-20
ddr: altera: Replace ad-hoc constant with macro
Marek Vasut
1
-2
/
+2
2016-03-27
Fix typo choosen in comments and printf logs
Alexander Merkle
1
-2
/
+2
2016-03-24
arm: mvebu: Fix ddr3_init() cpu config
Dirk Eibach
1
-2
/
+0
2016-03-21
driver/ddr/fsl: Add workaround for erratum A-009803
Shengzhou Liu
1
-5
/
+39
2016-03-21
driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discrete
Shengzhou Liu
2
-7
/
+63
2016-02-06
Use correct spelling of "U-Boot"
Bin Meng
1
-1
/
+1
2016-02-02
drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.
Purna Chandra Mandal
4
-0
/
+497
2016-01-25
drivers/ddr/fsl: fsl_ddr_sdram_size remove unused controllers
Ed Swarthout
1
-0
/
+1
2016-01-25
driver/ddr/fsl: Add workaround for A009663
Shengzhou Liu
1
-0
/
+10
2016-01-25
fsl/ddr: Add workaround for ERRATUM_A009942
Shengzhou Liu
1
-0
/
+18
2016-01-19
Add more SPDX-License-Identifier tags
Tom Rini
10
-30
/
+10
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