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JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
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visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
fpga
/
altera.c
Age
Commit message (
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)
Author
Files
Lines
2014-10-06
arm: socfpga: fpga: Add SoCFPGA FPGA programming interface
Pavel Machek
1
-0
/
+3
2014-10-06
fpga: altera: Turn the switches into table lookup
Marek Vasut
1
-111
/
+60
2014-10-06
fpga: altera: Make altera_validate return normal values
Marek Vasut
1
-9
/
+9
2014-10-06
fpga: altera: Move altera_validate to the top
Marek Vasut
1
-32
/
+26
2014-10-06
fpga: altera: More indentation trimdown
Marek Vasut
1
-118
/
+120
2014-10-06
fpga: altera: Clean up altera_validate function
Marek Vasut
1
-22
/
+21
2014-10-06
fpga: altera: Clean up the printing and debug
Marek Vasut
1
-59
/
+58
2014-06-12
m68k: Fix warnings with gcc 4.6
Simon Glass
1
-3
/
+3
2013-07-24
Add GPL-2.0+ SPDX-License-Identifier to source files
Wolfgang Denk
1
-18
/
+1
2013-04-02
Consolidate bool type
York Sun
1
-2
/
+2
2011-08-01
fpga: constify to fix build warning
Wolfgang Denk
1
-2
/
+2
2011-07-28
altera: fix printf typo
Michael Jones
1
-1
/
+1
2009-10-03
fpga: Remove relocation fixups
Peter Tyser
1
-39
/
+0
2008-12-06
FPGA: move fpga drivers to drivers/fpga
Jean-Christophe PLAGNIOL-VILLARD
1
-0
/
+283