index
:
starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
fpga
/
zynqpl.c
Age
Commit message (
Expand
)
Author
Files
Lines
2014-11-23
fs: API changes enabling extra parameter to return size of type loff_t
Suriyan Ramasami
1
-5
/
+5
2014-05-20
fpga: Added support to load bit stream from SD/MMC
Siva Durga Prasad Paladugu
1
-0
/
+85
2014-05-20
fpga: zynqpl: Clean partial bitstream handling
Michal Simek
1
-12
/
+6
2014-05-20
fpga: Define bitstream type based on command selection
Michal Simek
1
-2
/
+2
2014-05-13
fpga: zynq: Use helper function zynq_validate_bitstream
Siva Durga Prasad Paladugu
1
-7
/
+25
2014-05-13
fpga: zynq: Use helper functions for zynq dma
Siva Durga Prasad Paladugu
1
-86
/
+115
2014-05-13
fpga: zynq: Remove sparse warnings
Michal Simek
1
-2
/
+2
2014-05-13
fpga: xilinx: Simplify load/dump/info function handling
Michal Simek
1
-4
/
+9
2014-05-13
fpga: xilinx: Avoid CamelCase for in Xilinx_desc
Michal Simek
1
-3
/
+3
2014-03-04
sizes.h - consolidate for all architectures
Alexey Brodkin
1
-1
/
+1
2014-02-06
fpga: zynq: Correct fpga load when buf is not aligned
Novasys Ingenierie
1
-0
/
+10
2013-11-06
fpga: zynqpl: Do not place bitstream below 1MB
Michal Simek
1
-0
/
+7
2013-11-06
fpga: zynqpl: Add dcache flush support
Jagannadha Sutradharudu Teki
1
-2
/
+6
2013-10-15
Coding Style cleanup: remove trailing white space
Wolfgang Denk
1
-1
/
+1
2013-08-12
fpga: zynqpl: Clear loopback mode during device init
Soren Brinkmann
1
-0
/
+4
2013-08-12
fpga: zynqpl: Add support for zc7100 device.
Michal Simek
1
-1
/
+1
2013-07-24
Add GPL-2.0+ SPDX-License-Identifier to source files
Wolfgang Denk
1
-17
/
+1
2013-05-06
fpga: zynq: Add support for loading bitstream
Michal Simek
1
-0
/
+355