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path: root/drivers/fpga
AgeCommit message (Expand)AuthorFilesLines
2020-08-04fs: fs-loader: Drop dm.h header fileSimon Glass1-0/+1
2020-06-24arm64: xilinx: Print fpga error value in hexT Karthik Reddy2-2/+2
2020-06-24fpga: zynqpl: Flush dcache only for non-bitstream dataT Karthik Reddy1-2/+3
2020-06-24fpga: zynqpl: Check if aes engine is enabledIbai Erkiaga1-0/+8
2020-06-24fpga: zynqpl: Check fpga config completionT Karthik Reddy1-2/+17
2020-06-24fpga: zynqpl: Correct PL bitstream loading sequence for zynqaesSiva Durga Prasad Paladugu1-3/+4
2020-05-19common: Drop linux/bitops.h from common headerSimon Glass2-0/+2
2020-05-19common: Drop linux/delay.h from common headerSimon Glass9-0/+9
2020-05-19Fix some checkpatch warnings in calls to udelay()Simon Glass1-3/+3
2020-05-19common: Drop log.h from common headerSimon Glass11-0/+11
2020-05-19common: Drop init.h from common headerSimon Glass1-0/+1
2020-05-19common: Drop image.h from common headerSimon Glass1-0/+1
2020-05-19common: Drop net.h from common headerSimon Glass3-0/+3
2020-02-06dm: core: Create a new header file for 'compat' featuresSimon Glass1-0/+1
2020-01-07arm: socfpga: Convert system manager from struct to definesLey Foon Tan2-8/+3
2019-12-03common: Move ARM cache operations out of common.hSimon Glass2-0/+2
2019-12-03common: Move some cache and MMU functions out of common.hSimon Glass1-0/+1
2019-10-24arm64: zynqmp: Convert invoke_smc() to xilinx_pm_request()Michal Simek1-7/+9
2019-10-24arm64: versal: Rename versal_pm_request to xilinx_pm_requestMichal Simek1-1/+1
2019-10-24arm64: xilinx: Move firmware functions from platform to driverMichal Simek1-0/+1
2019-10-08arm64: zynqmp: use firmware driver to get versionIbai Erkiaga1-2/+2
2019-10-08firmware: zynqmp: create firmware headerIbai Erkiaga1-0/+1
2019-10-08fpga: zynqmp: Fix second local variable declarationMichal Simek1-1/+1
2019-10-08arm64: versal: fpga: Add PL bit stream load supportSiva Durga Prasad Paladugu4-1/+68
2019-07-30fpga: altera: cyclon2: Check function pointer before callingAlexander Dahl1-1/+5
2019-07-30fpga: altera: cyclon2: Fix indentationAlexander Dahl1-16/+16
2019-07-30fpga: altera: cyclon2: Fix most checkpatch warningsAlexander Dahl1-42/+39
2019-07-30fpga: virtex2: Add slave serial programming supportRobert Hancock1-13/+83
2019-07-30fpga: virtex2: Add additional clock cycles after DONE assertionRobert Hancock1-4/+16
2019-07-30fpga: virtex2: Split out image writing from pre/post operationsRobert Hancock1-157/+174
2019-07-30fpga: virtex2: added Kconfig optionRobert Hancock1-0/+8
2019-07-30fpga: virtex2: cosmetic: Cleanup code styleRobert Hancock1-134/+136
2019-07-21fpga: arria10: Fix error in fpga pin configurationDalon Westergreen1-4/+5
2019-05-10spl: socfpga: Implement fpga bitstream loading with socfpga loadfsTien Fong Chee1-1/+1
2019-05-10ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loadingTien Fong Chee1-13/+484
2019-05-10ARM: socfpga: Moving the watchdog reset to the for-loop status pollingTien Fong Chee1-1/+1
2019-05-10ARM: socfpga: Cleaning up and ensuring consistent format messages in driverTien Fong Chee1-6/+7
2019-04-16arm: zynq: Add an info message about post configSiva Durga Prasad Paladugu1-0/+2
2019-04-16fpga: Replace char * with const char * for filenameTien Fong Chee1-1/+2
2019-02-18ARM: socfpga: stratix10: Return valid error code from FPGA driverAng, Chee Hong1-11/+6
2019-01-24fpga: zynqmp: show an error message when FPGA programming failsLuca Ceresoli1-1/+1
2018-12-20arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device tableAng, Chee Hong1-0/+6
2018-12-20arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration DriverAng, Chee Hong3-0/+300
2018-10-31arm: socfpga: fpga: fix type of local variableSimon Goldschmidt2-2/+2
2018-09-26fpga: zynqmp: Modify PL bitstream loading sequenceSiva Durga Prasad Paladugu1-10/+25
2018-09-11fpga: Kconfig: Replace spaces with tabsMichal Simek1-8/+8
2018-07-19drivers: fpga: zynqpl: fix compilation with SPLLuis Araneda1-2/+2
2018-07-19xilinx: zynq: Add support to secure imagesSiva Durga Prasad Paladugu1-0/+45
2018-06-01fpga: zynqmp: Add secure bitstream loading for ZynqMPSiva Durga Prasad Paladugu2-0/+66
2018-06-01cmd: fpga: Add support to load secure bitstreamsSiva Durga Prasad Paladugu1-0/+29