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2022-12-06global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_*Tom Rini18-94/+94
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-06Convert CONFIG_SYS_NAND_SIZE to KconfigTom Rini1-0/+5
This converts the following to Kconfig: CONFIG_SYS_NAND_SIZE Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-06Convert CONFIG_SYS_NAND_PAGE_2K et al to KconfigTom Rini1-0/+13
This converts the following to Kconfig: CONFIG_SYS_NAND_PAGE_2K CONFIG_SYS_NAND_PAGE_4K Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-06Convert CONFIG_SYS_NAND_NO_SUBPAGE_WRITE to KconfigTom Rini1-0/+4
This converts the following to Kconfig: CONFIG_SYS_NAND_NO_SUBPAGE_WRITE Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-06Convert CONFIG_SYS_NAND_MAX_OOBFREE et al to KconfigTom Rini1-0/+18
This converts the following to Kconfig: CONFIG_SYS_NAND_MAX_OOBFREE CONFIG_SYS_NAND_MAX_ECCPOS Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-06mtd: nand: raw: atmel_nand: Use ATMEL_BASE_ECC directlyTom Rini1-9/+9
This is the only driver, and only one platform makes use of, setting CONFIG_SYS_NAND_ECC_BASE. Reference ATMEL_BASE_ECC directly in this case. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-06Convert CONFIG_SYS_NAND_HW_ECC to KconfigTom Rini2-5/+16
This converts the following to Kconfig: CONFIG_SYS_NAND_HW_ECC Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-06Convert CONFIG_SYS_NAND_HW_ECC_OOBFIRST to KconfigTom Rini1-0/+5
This converts the following to Kconfig: CONFIG_SYS_NAND_HW_ECC_OOBFIRST Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-06Convert CONFIG_SYS_NAND_DBW_8 et al to KconfigTom Rini1-0/+12
This converts the following to Kconfig: CONFIG_SYS_NAND_DBW_8 CONFIG_SYS_NAND_DBW_16 Note that all instances of the code check for CONFIG_SYS_NAND_DBW_16 being defined, and then "else" to CONFIG_SYS_NAND_DBW_8 whereas all of the configs set CONFIG_SYS_NAND_DBW_8. So we introduce CONFIG_SYS_NAND_DBW_16 as an option. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05mtd: spi-nor-core: Invert logic to reflect sst26 flash unlockedAlgapally Santosh Sagar1-1/+1
flash_is_locked is changed to flash_is_unlocked with commit 513c6071ce73 ("mtd: spi: Convert is_locked callback to is_unlocked"). sst26_is_locked() is also changed to sst26_is_unlocked() but the logic remained same. Invert the logic for the flash lock/unlock to work properly. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20221122051833.13306-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-10Convert CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST to KconfigTom Rini1-0/+4
This converts the following to Kconfig: CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10Convert CONFIG_SYS_MAX_NAND_DEVICE to KconfigTom Rini1-0/+4
This converts the following to Kconfig: CONFIG_SYS_MAX_NAND_DEVICE Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-31arm: bcmbca: replace ARCH_BCM6753 symbols in Kconfig with BCM6855William Zhang1-1/+1
As CONFIG_ARCH_BCM6753 is replaced with CONFIG_BCM6855, update the driver Kconfig to use the new config symbol. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-10-31arm: bcmbca: replace ARCH_BCM6858 symbols in Kconfig with BCM6858William Zhang1-1/+1
As CONFIG_ARCH_BCM6858 is replaced with CONFIG_BCM6858, update the driver Kconfig to use the new config symbol. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-10-31arm: bcmbca: replace ARCH_BCM68360 symbols in Kconfig with BCM6856William Zhang1-1/+1
As CONFIG_ARCH_BCM68360 is replaced with CONFIG_BCM6856, update the driver Kconfig to use the new config symbol. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-10-31arm: bcmbca: replace ARCH_BCM63158 symbols in Kconfig with BCM63158William Zhang1-1/+1
As CONFIG_ARCH_BCM63158 is replaced with CONFIG_BCM63158, update the Kconfig to use the new config symbol. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-10-23mtd: spi-nor-core: Fix index value for SCCR dwordsTakahiro Kuwano1-1/+1
Array index for SCCR 22th DWORD should be 21. Fixes: bebdc237507c ("mtd: spi-nor: Parse SFDP SCCR Map") Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23mtd: spi-nor-core: Rework s25hx_t_post_bfpt_fixup() for flash's internal ↵Takahiro Kuwano1-4/+19
address mode The flash's internal address mode is tracked by nor->add_mode_nbytes and it is set to 3 in BFPT parse. SEMPER multi-die package parts (>1Gb) are 3- or 4-byte address mode by default, depending on model number. We need to make sure that 4-byte address mode is used for multi-die package parts. For single-die package parts (<=1Gb), registers can be accessed by 3-byte address. Read, program, and erase use the 4B opcodes that always take 4-byte address regardless of flash's internal address mode. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23mtd: spi-nor-core: Rework spansion_read/write_any_reg() to use addr_mode_nbytesTakahiro Kuwano1-8/+8
Read/Write Any Register commands take 3- or 4- byte address depending on flash's internal address mode. The nor->addr_width tracks number of address bytes used in read/program/erase ops that can be 4 (with 4B opcodes) regardless of flash's internal address mode. The nor->addr_mode_nbytes tracks flash's internal address mode so replace nor->addr_width by that. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23mtd: spi-nor-core: Track flash's internal address modeTakahiro Kuwano1-0/+2
The nor->addr_width tracks number of address bytes used in read/program/erase ops and eventually set to 4 for >16MB chips, regardless of flash's internal address mode. For Infineon SEMPER flash's, we use Read/Write Any Register commands for configuration and status check. These commands take 3- or 4-byte address depending on flash's internal address mode. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23mtd: spi-nor-core: Default to addr_width of 3 for configurable widthsTakahiro Kuwano1-0/+1
JESD216D-01 mentions that "defaults to 3-Byte mode; enters 4-Byte mode on command." Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23mtd: spi-nor-ids: Add s28hl512t, s28hl01gt, and s28hs01gt IDsTakahiro Kuwano2-5/+10
Add flash info table entries for s28hl512gt, s28hl01gt, and s28hs01gt. These devices have the same functionality as s28hs512t. In spi-nor-core, use device ID byte to detect S28 family instead of device name. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23mtd: spi-nor-core: Rename configuration macro for S28 supportTakahiro Kuwano3-9/+9
Change configuration macro name to support all other devices in SEMPER S28 family. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23mtd: spi-nor-core: Rename s28hs512t prefixTakahiro Kuwano1-17/+17
Change prefix to support all other devices in SEMPER S28 family. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-09mtd: mxs_nand: Support EDO mode for imx8mn architectureMichael Trimarchi2-27/+239
Add support for imx8mn architecture in order to run the NAND in fast edo mode. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-10-09mtd: mxs_nand: get the clock with the right nameDario Binacchi1-3/+3
Rename the gpmi_apb_bch clock name to gpmi_bch_apb, as you can find in the device tree. Fixes: commit a59691280daca ("MXS_NAND: Add clock support for iMX8") Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-10-09mtd: mxs_nand: don't get the gpmi_apbh_dma clockDario Binacchi1-13/+0
This clock name is not present in any U-boot and Linux kernel device tree. Fixes: commit a59691280daca ("MXS_NAND: Add clock support for iMX8") Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-10-08mtd: nand: Fix SPL build after migration of CONFIG_SYS_NAND_SELF_INIT to KconfigRoger Quadros1-1/+1
This fixes the below build error if nand.c is included in an SPL build. /work/u-boot/drivers/mtd/nand/raw/nand.c: In function ‘nand_init_chip’: /work/u-boot/drivers/mtd/nand/raw/nand.c:82:28: error: ‘nand_chip’ undeclared (first use in this function) 82 | struct nand_chip *nand = &nand_chip[i]; | ^~~~~~~~~ /work/u-boot/drivers/mtd/nand/raw/nand.c:82:28: note: each undeclared identifier is reported only once for each function it appears in /work/u-boot/drivers/mtd/nand/raw/nand.c:84:20: error: ‘base_address’ undeclared (first use in this function); did you mean ‘base_addr’? 84 | ulong base_addr = base_address[i]; | ^~~~~~~~~~~~ | base_addr Fixes: 068c41f1cc77 ("Finish conversion CONFIG_SYS_NAND_SELF_INIT to Kconfig") Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-10-06mtd: nand: pxa3xx: simplify ECC hardware parametersChris Packham1-179/+68
Replace the if/else chain in pxa_ecc_init() with a lookup table. This makes the code more concise and hopefully easier to follow. Remove the unused ecc_layout tables and replace it with a single dummy one (the pxa3xx driver has never used this but the mtd subsystem expects it to be provided). Tested on an Allied Telesis x530 switch with Micron MT29F2G08ABAEAWP NAND Flash. Signed-off-by: Chris Packham <judge.packham@gmail.com>
2022-09-29dm: core: Drop ofnode_is_available()Simon Glass2-3/+3
This function is also available as ofnode_is_enabled(), so use that instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-19Merge branch 'master' into nextTom Rini1-1/+2
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-18cyclic: Use schedule() instead of WATCHDOG_RESET()Stefan Roese8-20/+20
Globally replace all occurances of WATCHDOG_RESET() with schedule(), which handles the HW_WATCHDOG functionality and the cyclic infrastructure. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
2022-09-13mtd: spi-nor-ids: Add Winbond W25Q512JVQ IDChin-Ting Kuo1-0/+5
Add ID for Winbond W25Q512JVQ device which is supported on AST2600 EVB by default. Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
2022-09-13mtd: spi-nor: Use spi-mem dirmap APIChin-Ting Kuo2-16/+115
This adds support for the dirmap API to the spi-nor subsystem, as introduced in Linux commit df5c21002cf4 ("mtd: spi-nor: use spi-mem dirmap API"). This patch is synchronize from the following patch https://patchwork.ozlabs.org/project/uboot/patch/20210205043924.149504-4-seanga2@gmail.com/ The corresponding Linux kernel SHA1 is df5c21002cf4. Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> Signed-off-by: Sean Anderson <seanga2@gmail.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
2022-09-02renesas: Fix RPC-IF compatible valuesGeert Uytterhoeven1-1/+2
The compatible values used for device nodes representing Renesas Reduced Pin Count Interfaces were based on preliminary versions of the Device Tree Bindings. Correct them in both DTSi files and drivers, to match the final DT Bindings. Note that there are no DT bindings for RPC-IF on RZ/A1 yet, hence the most logical SoC-specific value is used, without specifying a family-specific value. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-22mtd: rawnand: fsl_elbc: Fix reading address pointer from DTPali Rohár1-1/+1
During compilation gcc throws warning: drivers/mtd/nand/raw/fsl_elbc_nand.c: In function ‘fsl_elbc_nand_probe’: drivers/mtd/nand/raw/fsl_elbc_nand.c:841:31: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev); ^ Fix it by using dev_read_addr_ptr() function which returns pointer instead of dev_read_addr() which returns integer type. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22mtd: rawnand: fsl_elbc: Remove NAND_NO_SUBPAGE_WRITE flagPali Rohár1-1/+0
Subpage write support for freescale eLBC NAND controller driver is implemented in U-Boot and was fixes in the commit d3963721d93f ("nand: Sync with Linux v4.1"). So remove NAND_NO_SUBPAGE_WRITE flag from the fsl_elbc_nand.c driver. This partially revert commit cb04c7723429 ("nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC drivers"), only eLBC driver part. With this change U-Boot with default settings can read from NAND UBIFS image created on Linux with Linux default settings. Prior this change U-Boot was unable to read from NAND UBIFS images created with Linux default settings due to differnet UBI geometry. Linux kernel fsl_elbc_nand.c driver also does not set NAND_NO_SUBPAGE_WRITE flag and has implemented subpage write support. Fixes: cb04c7723429 ("nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC drivers") Fixes: d3963721d93f ("nand: Sync with Linux v4.1") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Acked-By: Michael Trimarchi<michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22mtd: nand: samsung: Retrieve ECC requirements from extendedMichael Trimarchi1-0/+20
Upstream linux commit 8fc82d456e40a0. On some nand controllers with hw-ecc the controller code wants to know the ecc strength and size and having these as 0, 0 is not accepted. Specifying these in devicetree is possible but undesirable as the nand may be different in different production runs of the same board, so it is better to get this info from the nand id where possible. This commit adds code to read the ecc strength and size from the nand for Samsung extended-id nands. This code is based on the info for the 5th id byte in the datasheets for the following Samsung nands: K9GAG08U0E, K9GAG08U0F, K9GAG08X0D, K9GBG08U0A, K9GBG08U0B. These all use these bits in the exact same way. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22mtd: nand: Rename nand_get_flash_type() into nand_detect()Michael Trimarchi3-9/+7
Upstream linux commit 7bb427990ee364. Rename the function to match this new behavior. NOTE: fix nand_detect/nand_get_flash_type parameters in mxs_nand_spl. This code seems never executed by any board as alternative for nand detect Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22mtd: nand: change return type of nand_get_flash_type() to intMichael Trimarchi3-24/+22
Upstream linux commit 4722c0e958e636. The returned "type" is never used in nand_scan_ident() and spl code Make nand_get_flash_type() simply return an integer value in order to avoid unnecessary ERR_PTR/PTR_ERR dance. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22mtd: nand: Rename the nand_manufacturers structMichael Trimarchi2-3/+3
Upstream linux commit 8cfb9ab68f9070. Drop the 's' at the end of nand_manufacturers since the struct is actually describing a single manufacturer, not a manufacturer table. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-10common: Drop display_options.h from common headerSimon Glass3-0/+3
Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-04Convert CONFIG_SYS_FLASH_QUIET_TEST to KconfigTom Rini1-0/+8
This converts the following to Kconfig: CONFIG_SYS_FLASH_QUIET_TEST Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04Convert CONFIG_SYS_MAX_FLASH_SECT to KconfigTom Rini1-0/+5
This converts the following to Kconfig: CONFIG_SYS_MAX_FLASH_SECT Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04Audit <flash.h> inclusionTom Rini3-3/+0
A large number of files include <flash.h> as it used to be how various SPI flash related functions were found, or for other reasons entirely. In order to migrate some further CONFIG symbols to Kconfig we need to not include flash.h in cases where we don't have a NOR flash of some sort enabled. Furthermore, in cases where we are in common code and it doesn't make sense to try and further refactor the code itself in to new files we need to guard this inclusion. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04flash: Remove pic32_flash.cTom Rini3-469/+0
As the only pic32 platform does not enable flash, this is dead code. Remove it. Cc: Purna Chandra Mandal <purna.mandal@microchip.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04Convert CONFIG_SYS_FLASH_ERASE_TOUT et al to KconfigTom Rini1-0/+12
This converts the following to Kconfig: CONFIG_SYS_FLASH_ERASE_TOUT CONFIG_SYS_FLASH_LOCK_TOUT CONFIG_SYS_FLASH_UNLOCK_TOUT CONFIG_SYS_FLASH_WRITE_TOUT In practice, for two m68k platforms we move to hard-coding with a comment the timeout values, rather than try and make convoluted Kconfig logic. We add options for the write and erase options to the pic32 flash driver, as this driver does make use of them. Everywhere else these are unreferenced values. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04Convert CONFIG_SYS_FLASH_CHECKSUM to KconfigTom Rini1-0/+7
This converts the following to Kconfig: CONFIG_SYS_FLASH_CHECKSUM Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04Convert CONFIG_SYS_FLASH_EMPTY_INFO to KconfigTom Rini1-0/+4
This converts the following to Kconfig: CONFIG_SYS_FLASH_EMPTY_INFO Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-29arm: mvebu: Fix compatible string for nand controllerPali Rohár1-1/+1
Linux kernel uses compatible string "marvell,armada370-nand-controller" for nand controllers on Armada 370/XP/38x. U-Boot currently uses mix of "marvell,armada370-nand" and "marvell,mvebu-pxa3xx-nand". So unify it and use just Linux kernel compatible string. Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Stefan Roese <sr@denx.de>
generated by cgit v1.2.3 (git 2.39.0) at 2024-10-10 00:37:48 +0300