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path: root/drivers/net/designware.c
AgeCommit message (Expand)AuthorFilesLines
2016-01-15Fix GCC format-security errors and convert sprintfs.Ben Whitten1-1/+1
2016-01-12dm: pci: Add a dm_ prefix to pci_get_bdf()Simon Glass1-1/+1
2015-12-22net: designware: Zap trailing backslashMarek Vasut1-7/+7
2015-12-22net: eth_designware: select PHYLIB in KconfigThomas Chou1-4/+0
2015-10-29net: designware: Add driver remove supportBin Meng1-0/+12
2015-09-17net: designware: Add support to PCI designware devicesBin Meng1-0/+42
2015-09-09net: designware: Fix build warningsBin Meng1-4/+4
2015-08-08net: designware: Rename the driver var name to eth_designwareMarek Vasut1-1/+1
2015-08-08net: designware: Add SoCFPGA GMAC DT compatible stringMarek Vasut1-0/+1
2015-07-22dm: eth: Avoid blocking on packet receptionSimon Glass1-1/+1
2015-07-08net: designware: Program MAC address to hardware after soft resetBin Meng1-0/+6
2015-05-19net: Update hardware MAC address if it changes in envJoe Hershberger1-4/+0
2015-04-18dm: net: Adjust designware driver to support driver modelSimon Glass1-16/+151
2015-04-18dm: net: Tidy up designware driver ready for driver modelSimon Glass1-34/+53
2015-04-18net: cosmetic: Fix var naming net <-> eth driversJoe Hershberger1-1/+1
2015-03-05net: Support DMA threshold mode in DWMAC driverSonic Zhang1-0/+5
2015-03-05net: configure DWMAC DMA by default AXI burst lengthSonic Zhang1-0/+4
2015-01-31net/designware: add error message on DMA reset timeoutAlexey Brodkin1-1/+3
2014-10-06net: dwc: Make the cache handling less crypticMarek Vasut1-25/+23
2014-10-06net: dwc: Fix cache alignment issuesMarek Vasut1-2/+4
2014-05-25net/designware: Make DMA burst length configurable and reduce by defaultIan Campbell1-1/+1
2014-05-25net/designware: ensure cache invalidations are aligned to ARCH_DMA_MINALIGNIan Campbell1-5/+13
2014-05-25net/designware: ensure device private data is DMA aligned.Ian Campbell1-1/+2
2014-05-13net/designware: call phy_connect_dev() to properly setup phylib deviceIan Campbell1-0/+2
2014-02-07net/designware: make driver compatible with data cacheAlexey Brodkin1-3/+50
2014-02-07net/designware - switch driver to phylib usageAlexey Brodkin1-311/+149
2014-02-07net/designware: add explicit reset of {tx|rx}_currdescnumAlexey Brodkin1-0/+2
2013-11-23net: designware: Respect "bus mode" register contents on SW resetAlexey Brodkin1-1/+1
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk1-17/+1
2013-06-25net/designware: Do not select MIIPORT for RGMII interfaceVipin Kumar1-1/+3
2012-07-11net/designware: Consecutive writes to the same register to be avoidedDinh Nguyen1-2/+2
2012-07-07net: Multiple updates/enhancements to designware.cStefan Roese1-69/+49
2012-07-07SPEAr: Add interface information in initializationVipin Kumar1-1/+9
2012-05-23net: Fix remaining API interface breakageJoe Hershberger1-3/+2
2012-04-04net/designware: Change timeout loop implementationAmit Virdi1-16/+38
2012-04-04net/designware: Set ANAR to 0x1e1Armando Visconti1-0/+3
2012-04-04net/designware: Program phy registers when auto-negotiation is ONVikas Manocha1-14/+29
2012-04-04net/designware: Try configuring phy on each dw_eth_initVipin Kumar1-21/+29
2012-04-04net/designware: Consecutive writes must have delayArmando Visconti1-2/+1
2012-04-04net/designware: Phy address fixVipin KUMAR1-1/+1
2012-04-04net/designware: Fix to restore hw mac addressVipin KUMAR1-1/+6
2011-08-08Add Ethernet hardware MAC address framework to usbnetSimon Glass1-1/+1
2011-07-26net: designware: fix uninitialized phy_addr usageMike Frysinger1-0/+2
2011-07-26net: designware: fix unused warning when CONFIG_DW_AUTONEG is enabledMike Frysinger1-1/+3
2011-01-09miiphy: convert to linux/mii.hMike Frysinger1-27/+27
2010-08-09miiphy: constify device nameMike Frysinger1-2/+2
2010-07-12SPEAr : Network driver support addedVipin KUMAR1-0/+531
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