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path: root/drivers/net/dwc_eth_qos.c
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2023-11-29net: dwc_eth_qos: Add StarFive VisionFive 2 board supportHal Feng1-0/+13
Make the code be compatible with the StarFive VisionFive 2 board. The code is ported from tag JH7110_VF2_515_v3.9.3 of VF2 repo. Signed-off-by: Samin Guo <samin.guo@linux.starfivetech.com> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2022-10-18net:dwc_eth_qos:starfive: remove phy-reset-gpio setyanhong.wang1-18/+1
Phy-reset-gpio set is unused in JH7110 Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18net: dwc_eth_qos:starfive: update clk inityanhong.wang1-96/+23
Modify the clk init code for StarFive JH7110 platform. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18net: dwc_eth_qos:starfive: add jh7110 supportyanhong.wang1-0/+283
Add new configuration for jh7110 soc platform. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2021-07-22net: dwc_eth_qos: define LOG_CATEGORYPatrick Delaunay1-0/+2
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-22net: dwc: add a common empty ops eqos_null_opsPatrick Delaunay1-75/+22
Add a common empty ops: eqos_null_ops() to remove the duplicated empty functions and reduce the driver size for stm32 and imx config. This patch also aligns the prototype of ops 'eqos_stop_clks' with other eqos ops by adding return value. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-22net: dwc_eth_qos: use generic ethernet phy for stm32 variantPatrick Delaunay1-50/+0
Use the generic ethernet phy which already manages the correct binding for gpio reset, including the assert an deassert delays. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-22net: dwc_eth_qos: remove the field phyaddr of the struct eqos_privPatrick Delaunay1-5/+0
Since the commit commit 6a895d039ba7 ("net: Update eQos driver and FEC driver to use eth phy interfaces") the field phyaddr of driver private data struct eqos_priv is no more used in eqos_start() for the phy_connect() parameter. Now this variable is only initialized in eqos_probe_resources_stm32() it can be removed. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-06net: dwc_eth_qos: cosmetic: remove unused define EQOS_DESCRIPTOR_ALIGNPatrick Delaunay1-2/+0
Remove the define EQOS_DESCRIPTOR_ALIGN unused since the commit 6f1e668d964e ("net: dwc_eth_qos: Pad descriptors to cacheline size") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18net: dwc_eth_qos: Revert some changes of commit 3a97da12ee7bDaniil Stas1-12/+1
Revert some changes of commit 3a97da12ee7b ("net: dwc_eth_qos: add dwc eqos for imx support") that were probably added by mistake. One of these changes can lead to received data corruption (enabling FUP and FEP bits). Another causes invalid register rxq_ctrl0 settings for some platforms. And another makes some writes at unknown memory location. Fixes: 3a97da12ee7b ("net: dwc_eth_qos: add dwc eqos for imx support") Signed-off-by: Daniil Stas <daniil.stas@posteo.net> Cc: Ye Li <ye.li@nxp.com> Cc: Fugang Duan <fugang.duan@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18net: dwc_eth_qos: Fix needless phy auto-negotiation restartsDaniil Stas1-3/+3
Disabling clk_ck clock leads to link up status loss in phy, which leads to auto-negotiation restart before each network command execution. This issue is especially big for PXE boot protocol because of auto-negotiation restarts before each configuration filename trial. To avoid this issue don't disable clk_ck clock after it was enabled. Signed-off-by: Daniil Stas <daniil.stas@posteo.net> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-02-08net: eqos: Reduce the MDIO wait timeYe Li1-1/+1
Current MDIO wait time is too long, which introduce long delay when PHY negotiation register checking. Reduce it to 10us Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fugang Duan <Fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-01-19net: dwc_eth_qos: Pad descriptors to cacheline sizeMarek Vasut1-78/+51
The DWMAC4 IP has the possibility to skip up to 7 AXI bus width size words after the descriptor. Use this to pad the descriptors to cacheline size and remove the need for noncached memory altogether. Moreover, this lets Tegra use the generic cache flush / invalidate operations. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2020-12-19net: Update to use new sequence numbersSimon Glass1-1/+1
Checking for seq == -1 is effectively checking that the device is activated. The new sequence numbers are never -1 for a bound device, so update the check. Also drop the note about valid sequence numbers so it is accurate with the new approach. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass1-2/+2
Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass1-1/+1
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass1-2/+2
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-30net: dwc_eth_qos: Convert to use APIs which support live DTPatrick Delaunay1-4/+3
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the driver can support live DT. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-08-05net: dwc_eth_qos: add Kconfig option to select supported configurationPatrick Delaunay1-3/+9
Add configuration flag to select the supported dwc driver configuration: - CONFIG_DWC_ETH_QOS_TEGRA186 - CONFIG_DWC_ETH_QOS_IMX - CONFIG_DWC_ETH_QOS_STM32 See Linux driver ethernet/stmicro/stmmac and associated glue layers for other configuration examples. This patch removes the not-selected compatibles and lets the linker remove the unused functions to reduce the size of the driver. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-25treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada1-2/+2
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-24Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini1-2/+2
This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-20treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada1-2/+2
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-07net: dwc_eth_qos: update the compatible supported for STM32Patrick Delaunay1-1/+1
Update the compatible associated with the STM32 MPU glue in the DWC ethernet driver. The supported compatible is the specific "st,stm32mp1-dwmac" as indicated in Linux binding Documentation/devicetree/bindings/net/stm32-dwmac.txt and not the "snps,dwmac-4.20a" only used to the select IP version. This glue is implemented in Linux kernel in: drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c For information in stm32mp151.dtsi, the 2 compatibles are supported: ethernet0: ethernet@5800a000 { compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a"; ... }; Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-19common: Drop linux/bitops.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop linux/delay.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop log.h from common headerSimon Glass1-0/+1
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop net.h from common headerSimon Glass1-0/+1
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-10eQos: Implement the read_rom_hwaddr callbackYe Li1-0/+11
Implement the read_rom_hwaddr callback to load MAC address from fuse for imx8m platforms. Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: eqos: implement callbaks to get interface and set txclk rateFugang Duan1-3/+52
Implement the callbacks to get phy mode interface and txclk rate configuration. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: dwc_eth_qos: add dwc eqos for imx supportFugang Duan1-14/+171
Add dwc eqos for imx support. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10net: Update eQos driver and FEC driver to use eth phy interfacesYe Li1-14/+31
Update eQoS and fec ethernet drivers to support shared MDIO framework Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01net: dwc_eth_qos: Prevent DMA from writing updated RX DMA descriptorMarek Vasut1-1/+3
The DMA may attempt to write a DMA descriptor in the ring while it is being updated. By writing the DMA descriptor buffer address to 0, it is assured the DMA will not use such a buffer and the buffer can be updated without any interference. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01net: dwc_eth_qos: Invalidate RX packet DMA bufferMarek Vasut1-0/+6
This patch prevents an issue where the RX packet might have been accessed by the CPU, which now has cached data from the packet in the caches and possibly various write buffers, and these data may be evicted from the caches into the DRAM while the buffer is also written by the DMA. By invalidating the buffer after the CPU accessed it and before the DMA populates the buffer, it is assured that the buffer will not be corrupted. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01net: dwc_eth_qos: Invalidate RX descriptor before readingMarek Vasut1-0/+1
The current code polls the RX desciptor ring for new packets by reading the RX descriptor status. This works by accident, as the RX descriptors are often in non-cacheable memory. However, the driver does support use of RX descriptors in cacheable memory. This patch adds a missing RX descriptor invalidation, which assures the CPU will read a fresh copy of the RX descriptor instead of a cached one. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01net: dwc_eth_qos: Flush the RX descriptors on initMarek Vasut1-1/+1
Currently the code only flushes the first RX descriptor, not every entry in the RX descriptor ring. Fix this, to make sure the DMA engine can pick the RX descriptors correctly. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01net: dwc_eth_qos: Correctly wrap around TX descriptor tail pointerMarek Vasut1-1/+2
This code programs the next descriptor in the TX descriptor ring into the hardware as the last valid TX descriptor. The problem is that if the currenty descriptor is the last one in the array, the code will not wrap around correctly and use TX descriptor 0 again, but instead will use TX descriptor at address right past the TX descriptor ring, which is the first descriptor in the RX ring. Fix this by adding the necessary wrap-around. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01net: dwc_eth_qos: Fully rewrite RX descriptor field 3Marek Vasut1-2/+2
The RX descriptor field 3 should contain only OWN and BUF1V bits before being used for receiving data by the DMA engine. However, right now, if the descriptor was already used for receiving data and is being cleared, the field 3 is only modified and the aforementioned two bits are ORRed into the field. This could lead to a residual dirty bits being left in the field 3 from previous transfer, and it generally does. Fully set the field 3 instead to clear those residual dirty bits. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com>
2020-04-15net: dwc_eth_qos: implement phy reg and max-speed for stm32Patrick Delaunay1-1/+18
Add management of property "reg" to configure @ of phy and also "max-speed" property to specify maximum speed in Mbit/s supported by the device Signed-off-by: Christophe Roullier <christophe.roullier@st.com> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-15net: dwc_eth_qos: implement reset-gpios for stm32Christophe Roullier1-0/+53
Add management of property "reset-gpios" in the node identified by "phy-handle" to configure any GPIO used to reset the PHY. Signed-off-by: Christophe Roullier <christophe.roullier@st.com> Reviewed-by: Patrice CHOTARD <patrice.chotard@st.com> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-02-06dm: core: Create a new header file for 'compat' featuresSimon Glass1-0/+1
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-12-20net: dwc_eth_qos: Pass -1 to phy_connect() to scan for all PHYsMarek Vasut1-1/+1
PHY address 0 is a valid PHY address, to scan for all PHYs, pass -1 to phy_connect(). Passing 0 used to work before be accident, but does no longer. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-03common: Move ARM cache operations out of common.hSimon Glass1-0/+1
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-09-04net: dwc_et_qos: update weak function board_interface_eth_initPatrick Delaunay1-13/+3
Align the board and driver prototype for board_interface_eth_init to avoid execution issue (the interface_type parameter is defined as int or phy_interface_t). To have a generic weak function (it should be reused by other driver) I change the prototype to use directly udevice. This prototype is added in netdev.h to allow compilation check and avoid warning when compiling with W=1 on file board/st/stm32mp1/stm32mp1.c warning: no previous prototype for 'board_interface_eth_init'\ [-Wmissing-prototypes] int board_interface_eth_init(int interface_type, .... ^~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: dwc_eth_qos: Change eqos_ops function to staticPatrick Delaunay1-6/+6
This patch solves many warnings when compiling with W=1: warning: no previous prototype for '....' [-Wmissing-prototypes] Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-06-06net: dwc_eth_qos: add Ethernet stm32mp1 supportChristophe Roullier1-52/+383
Synopsys GMAC 4.20 is used. And Phy mode for eval and disco is RMII with PHY Realtek RTL8211 (RGMII) We also support some other PHY config on stm32mp157c PHY_MODE (MII,GMII, RMII, RGMII) and in normal, PHY wo crystal (25Mhz and 50Mhz), No 125Mhz from PHY config Signed-off-by: Christophe Roullier <christophe.roullier@st.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-18CONFIG_SPL_SYS_[DI]CACHE_OFF: addTrevor Woerner1-1/+1
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini1-2/+1
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-24wait_bit: use wait_for_bit_le32 and remove wait_for_bitÁlvaro Fernández Rojas1-8/+9
wait_for_bit callers use the 32 bit LE version Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-10-04treewide: replace with error() with pr_err()Masahiro Yamada1-46/+46
U-Boot widely uses error() as a bit noisier variant of printf(). This macro causes name conflict with the following line in include/linux/compiler-gcc.h: # define __compiletime_error(message) __attribute__((error(message))) This prevents us from using __compiletime_error(), and makes it difficult to fully sync BUILD_BUG macros with Linux. (Notice Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().) Let's convert error() into now treewide-available pr_err(). Done with the help of Coccinelle, excluing tools/ directory. The semantic patch I used is as follows: // <smpl> @@@@ -error +pr_err (...) // </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Re-run Coccinelle] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-01dm: Rename dev_addr..() functionsSimon Glass1-2/+2
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing functions to avoid confusion. In the end we will have: 1. dev_read_addr...() - works on devices, supports flat/live tree 2. devfdt_get_addr...() - current functions, flat tree only 3. of_get_address() etc. - new functions, live tree only All drivers will be written to use 1. That function will in turn call either 2 or 3 depending on whether the flat or live tree is in use. Note this involves changing some dead code - the imx_lpi2c.c file. Signed-off-by: Simon Glass <sjg@chromium.org>
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