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path: root/drivers/nvme
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2023-01-24bootstd: Add a new pre-scan priority for bootdevsSimon Glass1-2/+2
We need extensions to be set up before we start trying to boot any of the bootdevs. Add a new priority before all the others for tht sort of thing. Also add a 'none' option, so that the first one is not 0. While we are here, comment enum bootdev_prio_t fully and expand the test for the 'bootdev hunt' command. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-24bootstd: Add an NVMe bootdevSimon Glass2-0/+59
Add a bootdev for NVMe so that these devices can be used with standard boot. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-19Merge branch 'master' into nextTom Rini1-5/+20
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-16blk: Switch over to using uclass IDsSimon Glass1-1/+1
We currently have an if_type (interface type) and a uclass id. These are closely related and we don't need to have both. Drop the if_type values and use the uclass ones instead. Maintain the existing, subtle, one-way conversion between UCLASS_USB and UCLASS_MASS_STORAGE for now, and add a comment. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-16blk: Select SPL_LEGACY_BLOCK automaticallySimon Glass1-1/+0
Selecting this option can be handled in the Kconfig option itself, as it is with BLK. Update this an drop the various 'select' clauses. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-16blk: Rename HAVE_BLOCK_DEVICESimon Glass1-1/+1
This option is fact really related to SPL. For U-Boot proper we always use driver model for block devices, so CONFIG_BLK is enabled if block devices are in use. It is only for SPL that we have two cases: - SPL_BLK is enabled, in which case we use driver model and blk-uclass.c - SPL_BLK is not enabled, in which case (if we need block devices) we must use blk_legacy.c Rename the symbol to SPL_LEGACY_BLOCK to make this clear. This is different enough from BLK and SPL_BLK that there should be no confusion. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-16blk: Enable CONFIG_BLK for all mediaSimon Glass1-1/+0
Enable this option on all boards which support block devices. Drop the related depencies on BLK since these are not needed anymore. Disable BLOCK_CACHE on M5253DEMO as this causes a build error. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-15nvme: Fix multipage prp-listAlexander Sowarka1-4/+4
The nvme driver falsely assumed that the last entry on a page of the prp-list always points to the next page of the prp-list. This potentially can lead to the illegal creation of pages on the prp-list with only a single entry. This change now ensures that splitting the prp-list into multiple pages, behaves now as required by the NVME-Spec. Related to this, also the size of the memory allocation is adjusted accordingly. Signed-off-by: Alexander Sowarka <alexander.sowarka@aerq.com>
2022-08-26nvme: Do a clean NVMe shutdownHector Martin1-5/+20
The brute-force controller disable method can end up racing controller initialization and causing a crash when we shut down Apple ANS2 NVMe controllers. Do a proper controlled shutdown, which does block until things are quiesced properly. This is nicer in general for all controllers. Signed-off-by: Hector Martin <marcan@marcan.st> Tested-by: Mark Kettenis <kettenis@openbsd.org> (firefly-rk3399)
2022-06-23arm: apple: nvme: Add SART support and RTKit buffer managementJanne Grunau1-4/+68
The NVMe firmware in the macOS 13 beta blocks or crashes with u-boot's current minimal RTKit implementation. It does not provide buffers for the firmware's buffer requests. The ANS2 firmware included in macOS 11 and 12 tolerates this. The firmware included in the first macOS 13 beta requires buffers for the crashlog and ioreport endpoints to function. In the case of the NVMe the buffers are physical memory. Access to physical memory is guarded by what Apple calls SART. Import m1n1's SART driver (exclusively used for the NVMe controller). Implement buffer management helpers for RTKit. These are generic since other devices (none in u-boot so far) require different handling. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Tested-by: Mark Kettenis <kettenis@openbsd.org>
2022-05-04pci: Add mask parameter to dm_pci_map_bar()Andrew Scull1-1/+1
Add a mask parameter to control the lookup of the PCI region from which the mapping can be made. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03pci: Map bars with offset and lengthAndrew Scull1-2/+2
Evolve dm_pci_map_bar() to include an offset and length parameter. These allow a portion of the memory to be mapped and range checks to be applied. Passing both the offset and length as zero results in the previous behaviour and this is used to migrate the previous callers. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-04-09nvme: call device_probe() after scanningAKASHI Takahiro1-0/+4
Every time a nvme bus/port is scanned and a new device is detected, we want to call device_probe() as it will give us a chance to run additional post-processings for some purposes. In particular, support for creating partitions on a device will be added. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-02-11nvme: apple: Add driver for Apple NVMe storage controllerMark Kettenis3-0/+252
Add a driver for the NVMe storage controller integrated on Apple SoCs. This NVMe controller isn't PCI based and deviates from the NVMe standard in its implementation of the command submission queue and the integration of an NVMMU that needs to be managed. This commit tweaks the core NVMe code to support the linear command submission queue implemented by this controller. But setting up the submission queue and managing the NVMMU controller is handled by implementing the driver ops that were added in an earlier commit. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested-on: firefly-rk3399 Tested-by: Mark Kettenis <kettenis@openbsd.org> Tested on: Macbook Air M1 Tested-by: Simon Glass <sjg@chromium.org>
2022-02-11nvme: Add shutdown functionMark Kettenis2-0/+19
Add a function to disable the NVMe controller. This will be used to let the driver for the NVMe storage integrated on Apple SoCs shutdown the NVMe controller such we can shutdown the NVMe IOP controller in a clean way afterwards before handing control to the OS. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested on: Macbook Air M1 Tested-by: Simon Glass <sjg@chromium.org>
2022-02-11nvme: Introduce driver opsMark Kettenis2-27/+73
The NVMe storage controller integrated on Apple SoCs deviates from the NVMe standard in two aspects. It uses a "linear" submission queue and it integrates an NVMMU that needs to be programmed for each NVMe command. Introduce driver ops such that we can set up the linear submission queue and program the NVMMU in the driver for this strange beast. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested on: Macbook Air M1 Tested-by: Simon Glass <sjg@chromium.org>
2022-02-11nvme: Split out PCI supportMark Kettenis5-36/+65
Apple SoCs have an integrated NVMe controller that isn't connected over a PCIe bus. In preparation for adding support for this NVMe controller, split out the PCI support into its own file. This file is selected through a new CONFIG_NVME_PCI Kconfig option, so do a wholesale replacement of CONFIG_NVME with CONFIG_NVME_PCI. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested on: Macbook Air M1 Tested-by: Simon Glass <sjg@chromium.org>
2022-01-14nvme: Do not allocate 8kB buffer on stackPali Rohár1-9/+26
Calling 'nvme scan' followed by 'nvme detail' crashes U-Boot on Turris Omnia with the following error: undefined instruction pc : [<0a000000>] lr : [<7ff80bfc>] reloc pc : [<8a8c0000>] lr : [<00840bfc>] sp : 7fb2b908 ip : 0000002a fp : 02000000 r10: 04000000 r9 : 7fb2fed0 r8 : e1000000 r7 : 0c000000 r6 : 03000000 r5 : 06000000 r4 : 01000000 r3 : 7fb30928 r2 : 7fb30928 r1 : 00000000 r0 : 00000000 Flags: nZCv IRQs off FIQs off Mode SVC_32 Code: 0f0fb4f0 0f0fb4f0 0f0fb4f0 0f0fb4f0 (f0f04b0f) Resetting CPU ... This happens when nvme_print_info() tries to return to the caller. It looks like this error is caused by trying to allocate 8 KiB of memory on the stack by the two uses of ALLOC_CACHE_ALIGN_BUFFER(). Use malloc_cache_aligned() to allocate this memory dynamically instead. This fixes 'nvme detail' on Turris Omnia. Note that similar change was applied to file drivers/nvme/nvme.c in past by commit 2f83481dff9c ("nvme: use page-aligned buffer for identify command"). Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-12nvme: invalidate correct memory range after readStefan Agner1-3/+4
The current code invalidates the range after the read buffer since the buffer pointer gets incremented in the read loop. Use a temporary pointer to make sure we have a pristine pointer to invalidate the correct memory range after read. Fixes: 704e040a51d2 ("nvme: Apply cache operations on the DMA buffers") Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-07-06dm: define LOG_CATEGORY for all uclassPatrick Delaunay1-0/+2
Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-23nvme: Don't clear nvme blk device's priv spaceBin Meng1-1/+0
A udevice's priv space is cleared in alloc_priv() in the DM core. Don't do it again in its probe() routine. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-06-23nvme: Drop useless members of 'struct nvme_ns'Bin Meng2-5/+1
mode_select_num_blocks and mode_select_block_len in 'struct nvme_ns' are not useful. Drop them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-06-23nvme: Eliminate the offset of one during block dev creationBin Meng1-3/+3
At present there is an offset of one added during the creation of block device. This can be very confusing as we wanted to encode the namespace id in the block device name but namespae id cannot be zero. This changes to use the namespace id directly in the block device name, eliminating the offset of one effectively. Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-06-23nvme: Skip block device creation for inactive namespacesBin Meng1-1/+22
At present for each namespace there is a block device created for it. There is no issue if the number of supported namespaces reported from the NVMe device is only 1. Since QEMU commit 7f0f1acedf15 ("hw/block/nvme: support multiple namespaces"), the number of supported namespaces reported has been changed from 1 to 256, but not all of them are active namespaces. The actual active one depends on the QEMU command line parameters. A common case is that namespace 1 being active and all other 255 being inactive. If a namespace is inactive, the namespace identify command returns a zero filled data structure. We can use field NSZE (namespace size) to decide whether a block device should be created for it. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-06-23nvme: Move block dev creation from uclass post_probe() to driver probe()Bin Meng2-30/+18
At present the block device creation happens in the NVMe uclass driver post_probe() phase. In preparation to support multiple namespaces, we should issue namespace identify before creating block devices but that touches the underlying hardware hence it is not appropriate to do such in the uclass driver post_probe(). Let's move it to driver probe() phase instead. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-06-23nvme: Remove the redundant aqa value settingWesley Sheng1-1/+0
AQA (Admin Queue Attributes) register is a dword size with lower word of ASQS, and higher word of ACQS. The code set the variable aqa twice, but it is redundant. Signed-off-by: Wesley Sheng <wesleyshenggit@sina.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-06-23nvme: Correct the prps per page calculation methodWesley Sheng1-1/+1
Each prp is 8 bytes, calculate the number of prps per page should just divide page size by 8 there is no need to minus 1 Signed-off-by: Wesley Sheng <wesleyshenggit@sina.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-06-23nvme: fix for big endian systemsDavid Lamparter1-4/+4
writel() and co. already include the endian swap; doing the swap twice is, er, unhelpful. Tested on a P4080DS, which boots perfectly fine off NVMe with this. Signed-off-by: David Lamparter <equinox@diac24.net> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-19nvme: Elaborate on cache maintenance operation in get/set_featuresAndre Przywara1-5/+20
At the moment the nvme_get_features() and nvme_set_features() functions carry a (somewhat misleading) comment about missing cache maintenance. As it turns out, nvme_get_features() has no caller at all in the tree, and nvme_set_features' only user doesn't use a DMA buffer. Mention that in the comment, and leave some breadcrumbs for the future, should those functions attract more users. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-19nvme: Always invalidate whole cqes[] arrayAndre Przywara1-4/+12
At the moment nvme_read_completion_status() tries to invalidate a single member of the cqes[] array, which is shady as just a single entry is not cache line aligned. The structure is dictated by hardware, and with 16 bytes is smaller than any cache line we usually deal with. Also multiple entries need to be consecutive in memory, so we can't pad them to cover a whole cache line. As a consequence we can only always invalidate all of them - U-Boot just uses two of them anyway. This is fine, as they are only ever read by the CPU (apart from the initial zeroing), so they can't become dirty. Make this obvious by always invalidating the whole array, regardless of the entry number we are about to read. Also blow up the allocation size to cover whole cache lines, to avoid other heap allocations to sneak in. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-06Merge tag 'v2021.01-rc5' into nextTom Rini1-8/+0
Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-04nvme: Use only 32-bit accesses in nvme_writeq/nvme_readqStefan Agner1-8/+0
There might be hardware configurations where 64-bit data accesses to NVMe registers are not supported properly. This patch removes the readq/writeq so always two 32-bit accesses are used to read/write 64-bit NVMe registers, similarly as it is done in Linux kernel. This patch fixes operation of NVMe devices on RPi4 Broadcom BCM2711 SoC based board, where the PCIe Root Complex, which is attached to the system through the SCB bridge. Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely the 64-bit wide register accesses initiated by the CPU are not properly translated to a sequence of 32-bit PCIe accesses. nvme_readq(), for example, always returns same value in upper and lower 32-bits, e.g. 0x3c033fff3c033fff which lead to NVMe devices to fail probing. This fix is analogous to commit 8e2ab05000ab ("usb: xhci: Use only 32-bit accesses in xhci_writeq/xhci_readq"). Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Cc: Matthias Brugger <mbrugger@suse.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Agner <stefan@agner.ch>
2020-12-14dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass1-1/+1
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass1-3/+3
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass1-2/+2
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-23nvme: Invalidate dcache before submitting admin cmdJagan Teki1-0/+3
This patch try to avoids eviction of dirty lines during DMA transfer. The code right now execute the following step: - allocate the buffer - start a dma operation using the non-coherent dma buffer - invalidate cache lines associated with the buffer - read the buffer This can lead to reading back not valid information, because the cache controller could evict dirty cache lines belonging to the buffer *after* the DMA operation has started to fill the DRAM. In order to avoid this, a new invalidation is required *before* starting the DMA operation. The patch just adds an invalidation before submitting the DMA command. Example below shows the nvme disk scan result without the following patch => nvme scan nvme_get_info_from_identify: nn = 544502629, vwc = 100, sn = dev_0T, mn = `�\�, fr = t_part, mdts = 105 So, invalidating the cache before submitting the admin command, fix the cpu read. Cc: André Przywara <andre.przywara@arm.com> Reported-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-05-19common: Drop log.h from common headerSimon Glass1-0/+1
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop part.h from common headerSimon Glass2-0/+2
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-06dm: core: Create a new header file for 'compat' featuresSimon Glass1-0/+2
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-12-03common: Move ARM cache operations out of common.hSimon Glass1-0/+1
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-03common: Move get_ticks() function out of common.hSimon Glass1-0/+1
This function belongs in time.h so move it over and add a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-10-31nvme: use page-aligned buffer for identify commandPatrick Wildt1-6/+18
Change the stack-allocated buffer for the identification command to explicitly allocate page-aligned buffers. Even though the spec seems to allow having admin queue commands on non page-aligned buffers, it seems to not be possible on my i.MX8MQ board with a a Silicon Power P34A80. Since all of the NVMe drivers I have seen always do admin commands on a page-aligned buffer, which does work on my system, it makes sense for us to do that as well. Signed-off-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-31nvme: flush dcache on both r/w, and the prp listPatrick Wildt1-3/+5
It's possible that the data cache for the buffer still holds data to be flushed to memory, since the buffer was probably used as stack before. Thus we need to make sure to flush it also on reads, since it's possible that the cache is automatically flused to memory after the NVMe DMA transfer happened, thus overwriting the NVMe transfer's data. Also add a missing dcache flush for the prp list. Signed-off-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-06nvme: add accessor to namespace id and eui64Patrick Wildt2-0/+14
This adds a function which can be used by e.g. EFI to retrieve the namespace identifier and EUI64. For that it adds the EUI64 to its driver internal namespace structure and copies the EUI64 during namespace identification. Signed-off-by: Patrick Wildt <patrick@blueri.se> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-26nvme: Fix PRP Offset InvalidAaron Williams1-10/+19
When large writes take place I saw a Samsung EVO 970+ return a status value of 0x13, PRP Offset Invalid. I tracked this down to the improper handling of PRP entries. The blocks the PRP entries are placed in cannot cross a page boundary and thus should be allocated on page boundaries. This is how the Linux kernel driver works. With this patch, the PRP pool is allocated on a page boundary and other than the very first allocation, the pool size is a multiple of the page size. Each page can hold (4096 / 8) - 1 entries since the last entry must point to the next page in the pool. Signed-off-by: Aaron Williams <awilliams@marvell.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-19nvme: Fix warning of cast from pointer to integer of different sizeBin Meng2-4/+4
When dma_addr_t is u32 in 64-bit, there are some warnings when building NVME driver. Fix it by doing an additional (long) cast. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-11-14blk: Call part_init() in the post_probe() methodBin Meng1-1/+0
part_init() is currently called in every DM BLK driver, either in its bind() or probe() method. However we can use the BLK uclass driver's post_probe() method to do it automatically. Update all DM BLK drivers to adopt this change. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini6-14/+6
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-09Move most CONFIG_HAVE_BLOCK_DEVICE to KconfigAdam Ford1-0/+1
config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to Kconfig allows us to drastically shrink the logic in config_fallbacks.h Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-09-03nvme: Remove dead codes in nvme_setup_io_queues()Bin Meng1-3/+0
Execution cannot reach this statement: "nr_io_queues = result;" Reported-by: Coverity (CID: 166731) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>