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path: root/drivers/pinctrl
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2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass67-68/+68
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: Drop uses of dev_set_of_offset()Simon Glass1-1/+0
The need for this can be avoided by passing the correct node to the device_bind() function. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: Remove uses of device_bind_offset()Simon Glass8-18/+19
This function is not needed since the standard device_bind() can be used instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: core: Rename device_bind() to device_bind_offset()Simon Glass8-15/+16
This function is not necessary anymore, since device_bind_ofnode() does the same thing and works with both flattree and livetree. Rename it to indicate that it is special. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-25pinctrl: stmfx: update pin namePatrick Delaunay1-4/+4
Update pin name to avoid duplicated name with SOC GPIO gpio0...gpio15 / agpio0....agpio7: add a stmfx prefix. This pin name can be used in pinmux command. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25pinctrl: stmfx: update pincontrol and gpio device namePatrick Delaunay1-1/+4
The device name is used in pinmux command and in log trace so it is better to use the parent parent name ("stmfx@42" for example) than a generic name ("pinctrl" or "stmfx-gpio") to identify the device instance. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25pinctrl: stm32: display bias information for all pinsPatrick Delaunay1-12/+12
Display the bias information for input gpios or AF configuration, and not only for output pin, as described in Reference manual (Table 81. Port bit configuration table). Fixes: da7a0bb1f279 ("pinctrl: stm32: add information on pin configuration") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-22pinctrl: renesas: Drop unused members from struct sh_pfc_pinctrlLad Prabhakar1-4/+0
Drop unused members from struct sh_pfc_pinctrl. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-11-22pinctrl: renesas: r8a7795: Optimize pinctrl image size for R8A774E1Biju Das1-2/+12
This driver supports both RZ/G2H and R-Car H3 SoCs. Optimize pinctrl image size for RZ/G2H, when support for R-Car H3 (R8A7795) is not enabled Based on the similar patch on Linux. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-11-22pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1Biju Das1-0/+12
This driver supports both RZ/G2N and R-Car M3-N SoCs. Optimize pinctrl image size for RZ/G2N, when support for R-Car M3-N (R8A77965) is not enabled. Based on the simialr patch on Linux. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-11-22pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1Biju Das1-0/+12
This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs. Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+ (R8A7796[01]) is not enabled. Based on the similar patch on Linux. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-11-22pinctrl: renesas: r8a77951: Add R8A774E1 PFC supportBiju Das5-409/+519
Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951), however it doesn't have several automotive specific peripherals. Add a r8a77951 specific pin groups/functions along with common pin groups/functions for supporting both r8a77951 and r8a774e1 SoC. PFC changes are synced from mainline linux-5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-11-22pinctrl: renesas: r8a77965: Add R8A774B1 PFC supportBiju Das5-405/+513
Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965), however it doesn't have several automotive specific peripherals. Add a r8a77965 specific pin groups/functions along with common pin groups/functions for supporting both r8a77965 and r8a774b1 SoC. PFC changes are synced from mainline linux-5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-11-17pinctrl: k210: Rename power domains to match datasheetSean Anderson1-5/+5
This renames power domains to match the names on the k210 datasheet. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-11-17pinctrl: k210: Fix inverted IE and OE for I2CSean Anderson1-4/+7
I2C and SCCB previously shared defaults. However, SCCB needs OE_INV and IE_INV set, but I2C cannot have those bits set. This adds a separate default for SCCB. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com>
2020-11-06x86: pinctrl: Silence the warning when a pin is not foundSimon Glass1-1/+1
This does not necessarily indicate a problem, since some pins are optional. Let the caller show an error if necessary. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-05x86: Fix up driver names to avoid dtoc warningsSimon Glass1-1/+1
At present there are a lot of dtoc warnings reported when building chromebook_coral, of the form: WARNING: the driver intel_apl_lpc was not found in the driver list Correct these by using driver names that matches their compatible string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-10-20pinctrl: renesas: pfc-r8a77990: Sync PFC tables with Linux 5.9Lad Prabhakar1-27/+30
Sync the R8A77990 SoC PFC tables with Linux 5.9 , commit bbf5c979011a. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-10-08pinctrl: Add support for Kendryte K210 FPIOASean Anderson3-0/+745
The Fully-Programmable Input/Output Array (FPIOA) device controls pin multiplexing on the K210. The FPIOA can remap any supported function to any multifunctional IO pin. It can also perform basic GPIO functions, such as reading the current value of a pin. However, GPIO functionality remains largely unimplemented (in favor of the dedicated GPIO peripherals). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-08test: pinmux: Add test for pin muxingSean Anderson1-48/+138
This extends the pinctrl-sandbox driver to support pin muxing, and adds a test for that behaviour. The test is done in C and not python (like the existing tests for the pinctrl uclass) because it needs to call pinctrl_select_state. Another option could be to add a command that invokes pinctrl_select_state and then test everything in test/py/tests/test_pinmux.py. The pinctrl-sandbox driver now mimics the way that many pinmux devices work. There are two groups of pins which are muxed together, as well as four pins which are muxed individually. I have tried to test all normal paths. However, very few error cases are explicitly checked for. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-08pinctrl: Add pinmux property support to pinctrl-genericSean Anderson1-30/+97
The pinmux property allows for smaller and more compact device trees, especially when there are many pins which need to be assigned individually. Instead of specifying an array of strings to be parsed as pins and a function property, the pinmux property contains an array of integers representing pinmux groups. A pinmux group consists of the pin identifier and mux settings represented as a single integer or an array of integers. Each individual pin controller driver specifies the exact format of a pinmux group. As specified in the Linux documentation, a pinmux group may be multiple integers long. However, no existing drivers use multi-integer pinmux groups, so I have chosen to omit this feature. This makes the implementation easier, since there is no need to allocate a buffer to do endian conversions. Support for the pinmux property is done differently than in Linux. As far as I can tell, inversion of control is used when implementing support for the pins and groups properties to avoid allocating. This results in some duplication of effort; every property in a config node is parsed once for each pin in that node. This is not such an overhead with pins and groups properties, since having multiple pins in one config node does not occur especially often. However, the semantics of the pinmux property make such a configuration much more appealing. A future patch could parse all config properties at once and store them in an array. This would make it easier to create drivers which do not function solely as callbacks from pinctrl-generic. This commit increases the size of the sandbox build by approximately 48 bytes. However, it also decreases the size of the K210 device tree by 2 KiB from the previous version of this series. The documentation has been updated from the last Linux commit before it was split off into yaml files. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-06Merge tag 'u-boot-amlogic-20201005' of ↵Tom Rini2-1/+5
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - generate unique mac address from SoC serial on S400 board - Add USB support for GXL and AXG SoCs - Update Gadget code to use the new GXL and AXG USB glue driver - Add a VIM3 board support to add dynamic PCIe enable in OS DT - Fix AXG pinmux with requesting GPIOs - Add missing GPIOA_18 for AXG pinctrl - Add Amlogic PWM driver
2020-10-05Merge branch 'next'Tom Rini7-39/+314
Bring in the assorted changes that have been staged in the 'next' branch prior to release. Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-05pinctrl: meson-axg: add missing GPIOA_18Neil Armstrong1-0/+1
Add the missing GPIOA_18 from the missing EE gpio list. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05pinctrl: meson-axg-pmx: fix gpio requestNeil Armstrong1-1/+4
The AXG pmx driver gpio request offset needs the pin base to have the correct pin number. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2020-10-05Merge tag 'u-boot-atmel-2021.01-a' of ↵Tom Rini1-0/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel into next First set of u-boot-atmel features for 2021.01 cycle: This feature set includes a new CPU driver for at91 family, new driver for PIT64B hardware timer, support for new at91 family SoC named sama7g5 which adds: clock support, including conversion of the clock tree to CCF; SoC support in mach-at91, pinctrl and mmc drivers update. The feature set also includes updates for mmc driver and some other minor fixes and features regarding building without the old Atmel PIT and the possibility to read a secondary MAC address from a second i2c EEPROM.
2020-10-05Merge tag 'u-boot-stm32-20201003' of ↵Tom Rini1-20/+28
https://gitlab.denx.de/u-boot/custodians/u-boot-stm into next - stm32mp: DT alignment with Linux 5.9-rc4 - stm32mp: convert drivers to APIs which support live DT - stm32mp: gpio: minor fixes
2020-10-02pinctrl: bcm283x: Store the return value of dev_read_u32_default to intOvidiu Panait1-1/+1
Currently, the return value of dev_read_u32_default is stored in an u32, causing the subsequent "if (function < 0)" to always be false: u32 function; ... function = dev_read_u32_default(config, "brcm,function", -1); if (function < 0) { debug("Failed reading function for pinconfig %s (%d)\n", config->name, function); return -EINVAL; } Make "function" variable an int to fix this. Cc: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-10-02pinctrl: bcm283x: Read address from DT in ofdata_to_platdataOvidiu Panait1-7/+10
Factor out reading IP base address to ofdata_to_platdata function, which is designed for this purpose. Also, drop the dev->priv NULL check, since this is already done by the dm core when allocating space using priv_auto_alloc_size feature. (in drivers/core/device.c -> device_ofdata_to_platdata). Cc: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-10-02pinctrl: bcm283x: DM_FLAG_PRE_RELOC: Remove OF_CONTROL checkOvidiu Panait1-1/+1
Remove CONFIG_IS_ENABLED(OF_CONTROL) check from DM_FLAG_PRE_RELOC, since this driver only supports OF_CONTROL. drivers/pinctrl/broadcom/Kconfig: config PINCTRL_BCM283X depends on ARCH_BCM283X && PINCTRL_FULL && OF_CONTROL Cc: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-10-02pinctrl: stm32: Add header with SPDX licencePatrick Delaunay1-0/+5
Cosmetics: Add header with SPDX licence Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-10-02pinctrl: stm32: Convert to use APIs which support live DTPatrick Delaunay1-20/+23
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the driver can support live DT. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-09-26pinctrl: renesas: Fix PINCTRL_PFC_R8A774A1 help descriptionBiju Das1-10/+10
R8A774A1 is part of Renesas RZ/G2 series and not R-Car, reflect the same for PINCTRL_PFC_R8A774A1 help description Alongside, sort the PINCTRL_PFC_R8A774A1 config option as per increasing number of the SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-25pinctrl: at91-pio4: add compatible for sama7g5 pinctrl blockEugen Hristev1-0/+1
Add new compatible to microchip,sama7g5 new SoC. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-09-23pinmux: pic32: add SDHCI pin configJohn Robertson1-0/+28
The GPIO pins used by the SDHCI controller need to be configured to allow the interface to work. Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-17powerpc, qe: add DTS support for parallel I/O portsHeiko Schocher3-0/+263
add DM support for parallel I/O ports on QUICC Engine Block Signed-off-by: Heiko Schocher <hs@denx.de> Patch-cc: Mario Six <mario.six@gdsys.cc> Patch-cc: Qiang Zhao <qiang.zhao@nxp.com> Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Series-changes: 2 - remove RFC - fixed Codingstyle errors, therefore new patch powerpc, mpc83xx: fix codingstyle issues for qe_io.c - moved DM part to drivers/pinctrl Commit-notes: Open questions / discussion: - I let the old none DM based implementation in code so boards should work with old implementation. This should be removed if all boards are converted to DM/DTS. - Unfortunately linux DTS does not use "pinctrl-" properties, instead "pio-handle" properties. Even worser old U-Boot code initializes all pins defined in "const qe_iop_conf_t qe_iop_conf_tab[]" table in board code. As linux does the same I decided to also scan through all subnodes containing "pio-map" property and initialize them too. The proper solution would be to check for "pio-handle" when a device is probed. END
2020-09-01x86: pinctrl: Fix 'relatove' typoSimon Glass1-1/+1
Fix this typo in the Kconfig help. Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-22treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()Masahiro Yamada1-1/+1
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To help this tedious work, this commit converts devfdt_get_addr_ptr() to dev_read_addr_ptr() by coccinelle. I also removed redundant casts because dev_read_addr_ptr() returns an opaque pointer. To generate this commit, I ran the following semantic patch excluding include/dm/. <smpl> @@ type T; expression dev; @@ -(T *)devfdt_get_addr_ptr(dev) +dev_read_addr_ptr(dev) @@ expression dev; @@ -devfdt_get_addr_ptr(dev) +dev_read_addr_ptr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22dm: core: Fix devfdt_get_addr_ptr return valueOvidiu Panait1-1/+1
According to the description of devfdt_get_addr_ptr, this function should return NULL on failure, but currently it returns (void *)FDT_ADDR_T_NONE. Fix this by making devfdt_get_addr_ptr return NULL on failure, as described in the function comments. Also, update the drivers currently checking (void *)FDT_ADDR_T_NONE to check for NULL. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-20pinctrl: mediatek: mt8512: fix the wrong start address of rangesChunfeng Yun1-3/+3
The start address of dout, pullen and pullsel ragnes are wrong, so fix up them. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-05pinctrl: aspeed: Fix Kconfig entry indentationMichal Simek1-7/+7
Fix Kconfig entry indentation for Aspeed ast2500 pin control driver. Fixes: 4f0e44e46615 ("aspeed: AST2500 Pinctrl Driver") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-04Merge tag 'u-boot-imx-20200804' of ↵Tom Rini1-2/+4
https://gitlab.denx.de/u-boot/custodians/u-boot-imx For 2020.10 ----------- - fixes for Toradex board - fix warnings from previous PR - HAB: reset instead of panic after failure - new board: MYiR Tech MYS-6ULX - mx6cuboxi: use OF_PLATDATA - further changes for DM Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/714513163
2020-08-02drivers: rename more drivers to match compatible stringWalter Lozano1-2/+4
Continuing with the approach in commit <addf358bac1d2bd0> rename additional drivers to allow the OF_PLATDATA support. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29pinctrl: add nexell driverStefan Bosch8-0/+434
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - livetree API (dev_read_...) is used instead of fdt one (fdt...). - doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt added. Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29pinctrl: mediatek: add PUPD/R0/R1 support for MT7623David Woodhouse3-5/+146
The pins for the MMC controller weren't being set up correctly because the pinctrl driver only sets the GPIO pullup/pulldown config and doesn't handle the special cases with PUPD/R0/R1 control. Signed-off-by: David Woodhouse <dwmw2@infradead.org> Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-07-27Merge tag 'dm-pull-20jul20-take2a' of ↵Tom Rini8-8/+8
https://gitlab.denx.de/u-boot/custodians/u-boot-dm binman support for FIT new UCLASS_SOC patman switch 'test' command minor fdt fixes patman usability improvements
2020-07-25treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada7-7/+7
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()Masahiro Yamada1-1/+1
Use the _ptr suffixed variant instead of casting. Also, convert it to dev_read_addr_ptr(), which is safe to CONFIG_OF_LIVE. One curious part is an error check like follows in drivers/watchdog/omap_wdt.c: priv->regs = (struct wd_timer *)devfdt_get_addr(dev); if (!priv->regs) return -EINVAL; devfdt_get_addr() returns FDT_ADDR_T_NONE (i.e. -1) on error. So, this code does not catch any error in DT parsing. dev_read_addr_ptr() returns NULL on error, so this error check will work. I generated this commit by the following command: $ find . -name .git -prune -o -name '*.[ch]' -type f -print | \ xargs sed -i -e 's/([^*)]*\*)devfdt_get_addr(/dev_read_addr_ptr(/' I manually fixed drivers/usb/host/ehci-mx6.c Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25pinctrl: renesas: Enable R8A774A1 PFC tablesAdam Ford4-0/+23
The PFC tables for the R8A774A1 are already available, but they not enabled. This patch adds the Kconfig option and builds the corresponding file when PINCTRL_PFC_R8A774A1 is enabled. Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-24Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini8-8/+8
This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-10-05 21:31:42 +0300