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2022-02-08ram: k3-ddrss: Add support for J721S2 SoCDavid Huang1-1/+1
Add support for DDR subsystem in J721S2 SoC. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08ram: k3-ddrss: Add support for configuring MSMC subsystem in case of ↵Aswath Govindraju1-0/+158
Multiple DDR subsystems In Multi DDR subystems with interleaving support, the following needs to configured, - interleaving granular size and region - EMIFs to be enabled - EMIFs with ecc to be enabled - EMIF separated or interleaved - number of cycles of unsuccessful EMIF arbitration to wait before arbitrating for a different EMIF port, by default set to 3 Add support for configuring all the above by using a MSMC device Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08ram: k3-ddrss: Add support for multiple instances of DDR subsystemsAswath Govindraju1-51/+87
The current driver only supports single instance of DRR subsystem. Add support for probing multiple instances of DDR subsystem. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08ram: k3-ddrss: lpddr4_structs_if.h: Add a pointer to ddr instanceAswath Govindraju1-0/+1
Add a pointer to ddr instance int the lpddr4_privatedata_s structure for supporting mutliple instances of DDR in the drivers. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-01-20drivers: octeon: get rid of Unicode in codeHeinrich Schuchardt1-17/+17
Placing Unicode control codes <U+0080><U+0093> in the middle of a comment does not make much sense. Let's get rid of all Unicode in drivers/ram/octeon/octeon3_lmc.c. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-30ram: stm32mp1: remove __maybe_unused on stm32mp1_ddr_setupPatrick Delaunay1-1/+1
Since the commit f42045b2e750 ("stm32mp15: replace CONFIG_TFABOOT when it is possible") the function stm32mp1_ddr_setup is always called so the __maybe_unused can be removed. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30ram: stm32mp1: compute DDR size from DDRCTL registersPatrick Delaunay2-3/+191
Compute the DDR size from DDR controller register (mstr and addrmap) in U-Boot proper as the DDR information are useful only for SPL but not for U-Boot proper, for example with TFABOOT. This patch simplify U-Boot DT when several DDR size are supported and support of next SOC in STM32MP family. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30stm32mp1: ram: remove tuning supportPatrick Delaunay7-1636/+7
Remove the DDR interactive command tuning, as the support of a predefined DDR PHY tuning is removed for STM32MP1 driver in SPL and in TF-A and the result of this tuning will be never used. Moreover this SW tuning procedure can failed on some hardware configuration (to many BIST errors and no convergence); it will be no more supported in the next delivery of the DDR utilities included in the CubeMX tool of STMicroelectronics. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30stm32mp1: ram: remove the support of calibration resultPatrick Delaunay4-92/+27
The support of a predefined DDR PHY tuning result is removed for STM32MP1 driver because it is not needed at the supported frequency when built-in calibration is executed. The calibration parameters were provided in the device tree by the optional node "st,phy-cal", activated in ddr helper file by the compilation flag DDR_PHY_CAL_SKIP and filled with values generated by the CubeMX DDR utilities. This patch - updates the binding file to remove "st,phy-cal" support - updates the device trees and remove the associated defines - simplifies the STM32MP1 DDR driver and remove the support of the optional parameter "st,phy-cal" After this patch, the built-in calibration is always executed and the calibration registers are moved in the phy dynamic part; that allows manual tests. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30stm32mp1: ram: add read valid training supportPatrick Delaunay2-2/+7
Add the read data eye training = training for optimal read valid placement (RVTRN) when the built-in calibration is executed for LPDDR2 and LPDDR3. This training is supported on the PUBL integrated in the STM32MP15x DDR subsystem and it is not required for DDR3. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-10stm32mp15: replace CONFIG_TFABOOT when it is possiblePatrick Delaunay1-7/+6
In some part of STM32MP15 support the CONFIG_TFABOOT can be replaced by other config: CONFIG_ARMV7_PSCI and CONFIG_ARM_SMCCC. This patch also simplifies the code in cpu.c, stm32mp1_ram.c and clk_stml32mp1.c as execution of U-Boot in sysram (boot without SPL and without TFA) is not supported: the associated initialization code is present only in SPL. This cleanup patch is a preliminary step to support SPL load of OP-TEE in secure world, with SPL in secure world and U-Boot in no-secure world. Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-10-20ram: sifive: Fix -Wint-to-pointer-cast warningsBin Meng1-4/+4
The following warning is seen in sifive_ddr.c in a 32-bit build: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Change to use dev_read_addr_index_ptr(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-09-30WS cleanup: remove SPACE(s) followed by TABWolfgang Denk1-2/+2
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30WS cleanup: remove trailing white spaceWolfgang Denk1-1/+1
Signed-off-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-30WS cleanup: remove trailing empty linesWolfgang Denk1-1/+0
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-25clk: Rename clk_get_by_driver_info()Simon Glass1-1/+1
This is actually a misnomer now, since the phandle info may contain a driver_info index or a udevice index. Rename it to use the word 'phandle', which seems more accurate. Add a comment while we are here. Also add a test for this function. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25treewide: Try to avoid the preprocessor with OF_REALSimon Glass5-14/+18
Convert some of these occurences to C code, where it is easy to do. This should help encourage this approach to be used in new code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25treewide: Use OF_REAL instead of !OF_PLATDATASimon Glass6-8/+8
Now that we have a 'positive' Kconfig option, use this instead of the negative one, which is harder to understand. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-01Kconfig: Remove all default n/no optionsMichal Simek3-6/+0
default n/no doesn't need to be specified. It is default option anyway. Signed-off-by: Michal Simek <michal.simek@xilinx.com> [trini: Rework FSP_USE_UPD portion] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-02global: Convert simple_strtoul() with decimal to dectoul()Simon Glass1-1/+1
It is a pain to have to specify the value 10 in each call. Add a new dectoul() function and update the code to use it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-06dm: define LOG_CATEGORY for all uclassPatrick Delaunay1-0/+2
Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-18rockchip: rk3568: Add sdram driverJoseph Chen2-0/+57
Add the driver for rk3568 u-boot to get sdram capacity. Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-05-31drivers: ram: sifive: rename fu540_ddr and add fu740 supportGreen Wan3-49/+50
Rename fu540_ddr.c to sifive_ddr.c and add fu740 support Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-12ram: k3-ddrss: Enable vtt regulator if presentLokesh Vutla1-0/+14
Attempt to get and enable a vtt regulator if one is provided from the dts. If we do not find one, continue as not all platforms have this. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12ram: k3-ddrss: Introduce support for AM642 SoCsDave Gerlach20-0/+23490
Introduce support for the AM64 DDRSS controller which uses the 16bit variation of the controller. This controller shares much functionality with the existing J721e support, so this patch introduces only the new code needed for am64 specific support from "_16bit_" files with headers under "16bit/" include path/. Also add a CONFIG_K3_AM64_DDRSS option to the choice required for use with CONFIG_K3_DDRSS to allow selecting AM64 support. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12ram: k3-ddrss: Introduce common driver with J7 SoC supportDave Gerlach27-3849/+3675
Introduce a new version of the ddr driver which has the ability to support different variations of the controller. Also introduce support for the 32bit variation of the controller which is what was already supported by the previous version used for J721e and J7200. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12ram: k3-ddrss: Introduce top-level CONFIG_K3_DDRSSDave Gerlach2-2/+11
Create a new CONFIG_K3_DDRSS option to select the common parts of the k3-ddrss driver. Also introduce a choice that depends on the top level option to select CONFIG_K3_J721E_DDRSS for j721e support, and update corresponding Kconfig as required. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12ram: k3-j721e: Rename to k3-ddrssDave Gerlach20-1/+1
Rename the k3-j721e folder under drivers/ram to k3-ddrss in preparation of introducing additional support for other platforms to the same driver. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12ram: k3-j721e: lpddr4_ctl_regs: Fix checkpatch issue for typesDave Gerlach1-1514/+1514
Use Linux style u32 instead of uint32_t. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12ram: k3-j721e: lpddr4_pi_macros: Fix indentation issuesDave Gerlach1-2801/+2801
Fix the indentation for certain macros to be consistent with the other macros in the file, as the existing indentation does not make sense in many places. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12ram: k3-j721e: lpddr4_phy_core_macros: Fix indentation issuesDave Gerlach1-694/+694
Fix the indentation for certain macros to be consistent with the other macros in the file, as the existing indentation does not make sense in many places. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12ram: k3-j721e: lpddr4_ddr_controller_macros: Fix indentation issuesDave Gerlach1-3681/+3681
Fix the indentation for certain macros to be consistent with the other macros in the file, as the existing indentation does not make sense in many places. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12ram: k3-j721e: lpddr4_data_slice_3_macros: Fix indentation issuesDave Gerlach1-677/+677
Fix the indentation for certain macros to be consistent with the other macros in the file, as the existing indentation does not make sense in many places. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12ram: k3-j721e: lpddr4_data_slice_2_macros: Fix indentation issuesDave Gerlach1-677/+677
Fix the indentation for certain macros to be consistent with the other macros in the file, as the existing indentation does not make sense in many places. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12ram: k3-j721e: lpddr4_data_slice_1_macros: Fix indentation issuesDave Gerlach1-677/+677
Fix the indentation for certain macros to be consistent with the other macros in the file, as the existing indentation does not make sense in many places. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12ram: k3-j721e: lpddr4_data_slice_0_macros: Fix indentation issuesDave Gerlach1-717/+717
Fix the indentation for certain macros to be consistent with the other macros in the file, as the existing indentation does not make sense in many places. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12ram: k3-j721e: lpddr4_address_slice_0_macros: Fix indentation issuesDave Gerlach1-167/+167
Fix the indentation for certain macros to be consistent with the other macros in the file, as the existing indentation does not make sense in many places. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-04-23mips: octeon: Misc changes required because of the newly added headersStefan Roese2-28/+22
With the newly added headers and their restructuring (which macro is defined where), some changes in the already existing Octeon files are necessary. This patch makes the necessary changes. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-09Merge tag 'u-boot-stm32-20210409' of ↵Tom Rini1-0/+3
https://source.denx.de/u-boot/custodians/u-boot-stm Add rt-thread art-pi board support based on STM32H750 SoC Add Engicam i.Core STM32MP1 SoM Add FIP header support for STM32programmer Update uart number when no serial device found for STM32MP1 Remove board_check_usb_power function when ADC flag is not set Update SPL size limitation for STM32MP1 Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
2021-04-09ram: stm32: fix strsep failed on read only memorydillon min1-0/+3
strsep will change data from original memory address, in case the memory is in non-sdram/sram place, will run into a bug(hang at SDRAM: ) just add a temporary array to store bank_name[] to fix this bug. Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-08riscv: sifive: Rename fu540 board to unleashedBin Meng1-1/+1
In preparation to add SiFive Unmatched board support, let's rename the existing fu540 board to unleashed. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass9-0/+9
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-18ram: aspeed: Add AST2600 DRAM control supportDylan Hung3-2/+1123
AST2600 supports DDR4 SDRAM with maximum speed DDR4-1600. The DDR4 DRAM types including 128MbX16 (2Gb), 256MbX16 (4Gb), 512MbX16 (8Gb), 1GbX16 (16Gb), and 1GbX8 TwinDie (16Gb) are supported. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-17ram: k3-j721e: rename BIT_MASK()Heinrich Schuchardt2-15/+19
The macro BIT_MASK is already defined in include/linux/bitops.h. To avoid name collisions rename BIT_MASK() in drivers/ram/k3-j721e/lpddr4_private.h to LPDDR4_BIT_MASK(). Remove superfluous parantheses. Remove superfluous comparison to 0. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-13ram: stm32mp1: migrate trace to dev or log macroPatrick Delaunay5-104/+117
Define LOG_CATEGORY, use dev_ macro when it is possible and migrate other trace to log_ macro. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13ram: stm32: migrate trace to log macroPatrick Delaunay1-4/+6
Define LOG_CATEGORY, change debug to dev_dbg and remove "%s:" __func__ header as it is managed by dev macro (dev->name is displayed) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-12-14dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass6-27/+22
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass10-20/+20
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass9-30/+30
Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass10-10/+10
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
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