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path: root/drivers/ram
AgeCommit message (Expand)AuthorFilesLines
2019-11-17ram: rk3328: use common sdram driverYouMin Chen2-606/+159
2019-11-17ram: px30: add sdram driverYouMin Chen8-1/+1168
2019-11-17ram: rockchip: add phy driver code for PX30Kever Yang1-0/+205
2019-11-17ram: rockchip: add controller code for PX30Kever Yang1-0/+205
2019-11-17ram: rockchip: Default enable DRAM debug infoKever Yang1-0/+1
2019-11-17ram: rockchip: move sdram_debug function into sdram_commonKever Yang3-148/+144
2019-11-17ram: rockchip: add common code for sdram driverKever Yang3-0/+292
2019-11-17ram: rockchip: rename sdram_common.c/h to sdram.cKever Yang8-8/+8
2019-11-17ram: rockchip: rename sdram.h to sdram_rk3288.hKever Yang3-3/+3
2019-11-10ram: rk3328: Fix loading of skew valuesSimon South1-1/+1
2019-11-10ram: rk3328: Use correct frequency units in functionSimon South1-2/+2
2019-10-26ram: k3-j721e: Add support for J721E DDR controllerKevin Scholz21-0/+32102
2019-10-26ram: k3-am654: Do not rely on default values for certain DDR registerJames Doublesin2-7/+58
2019-10-26ram: k3-am654: add support for LPDDR4 and DDR3L DDRsJames Doublesin1-11/+230
2019-09-19ram: rk3288: Initialize dram for TPL buildsJagan Teki1-5/+10
2019-08-27stm32mp1: ram: add pattern parameter in infinite write testPatrick Delaunay1-11/+20
2019-08-27stm32mp1: ram: reload watchdog during ddr testPatrick Delaunay1-0/+3
2019-08-27stm32mp1: ram: update loop management in infinite testPatrick Delaunay1-13/+25
2019-08-27stm32mp1: ram: fix address issue in 2 testsPatrick Delaunay1-11/+14
2019-08-27stm32mp1: ram: cosmetic: remove unused prototypePatrick Delaunay1-4/+0
2019-08-23ram: rk3399: update cap and ddrconfig for each channel after initKever Yang1-78/+81
2019-08-05rockchip: ram: add full feature rk3328 DRAM driverKever Yang1-3/+1015
2019-07-20rockchip: rk322x: sdram: use udelay instead of rockchip_udelayKever Yang1-15/+14
2019-07-20ram: rk3399: Add lpddr4 set rate supportJagan Teki1-12/+661
2019-07-20ram: rk3399: Add set_rate sdram rk3399 opsJagan Teki1-3/+8
2019-07-20ram: rk3399: Add LPPDDR4-800 timings incJagan Teki1-0/+1570
2019-07-20ram: rk3399: Add LPPDDR4-400 timings incJagan Teki1-0/+1570
2019-07-20ram: rk3399: Add LPPDR4 mr detectionJagan Teki1-0/+226
2019-07-20ram: rk3399: Handle data training via opsJagan Teki1-10/+33
2019-07-20ram: rk3399: Simplify data training first argumentJagan Teki1-5/+4
2019-07-20ram: rk3399: Update lpddr4 vref_mode_acJagan Teki1-1/+2
2019-07-20ram: rk3399: Update lpddr4 mode_sel based on io settingsJagan Teki1-2/+5
2019-07-20ram: rk3399: Update lpddr4 vref based on io settingsJagan Teki1-5/+14
2019-07-20ram: rk3399: Get lpddr4 tsel_rd_en from io settingsJagan Teki1-2/+6
2019-07-20ram: rk3399: Configure soc odt supportJagan Teki1-1/+48
2019-07-20ram: rk3399: Add tsel control clock driveJagan Teki1-2/+14
2019-07-20ram: sdram: Configure lpddr4 tsel rd, wr based on IO settingsJagan Teki1-6/+36
2019-07-20ram: rk3399: Add IO settingsJagan Teki1-0/+104
2019-07-20ram: rk3399: Don't disable dfi dram clk for lpddr4, rank 1Jagan Teki1-2/+12
2019-07-20ram: rk3399: Configure tsel write ca for lpddr4Jagan Teki1-3/+12
2019-07-20ram: rk3399: Map chipselect for lpddr4Jagan Teki1-0/+10
2019-07-20ram: rk3399: Configure PHY RX_CM_INPUT for lpddr4Jagan Teki1-0/+22
2019-07-20ram: rk3399: Configure SLEWP_EN, SLEWN_EN for lpddr4Jagan Teki1-0/+21
2019-07-20ram: rk3399: Configure BOOSTP_EN, BOOSTN_EN for lpddr4Jagan Teki1-0/+24
2019-07-20ram: rk3399: Configure PHY_898, PHY_919 for lpddr4Jagan Teki1-0/+5
2019-07-20ram: rk3399: Avoid two channel ZQ Cal Start at the same timeJagan Teki1-0/+14
2019-07-20ram: rk3399: Don't wait for PLL lock in lpddr4Jagan Teki1-10/+16
2019-07-20ram: rk3399: Move mode_sel assignmentJagan Teki1-9/+3
2019-07-20ram: rk3399: Add lpddr4 rank mask for wdql trainingJagan Teki1-1/+4
2019-07-20ram: rk3399: Add lpddr4 rank mask for ca trainingJagan Teki1-1/+4
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