summaryrefslogtreecommitdiff
path: root/drivers/serial
AgeCommit message (Collapse)AuthorFilesLines
2022-10-18serial: ns16550: support a list of clkyanhong.wang1-0/+12
Add a list of clk enable operation. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2021-08-02global: Convert simple_strtoul() with decimal to dectoul()Simon Glass2-2/+2
It is a pain to have to specify the value 10 in each call. Add a new dectoul() function and update the code to use it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-31serial: a37xx: Do not call get_ref_clk() in _debug_uart_init()Pali Rohár1-1/+3
Static inline function _debug_uart_init() should avoid calling external (non-inline) functions. Therefore do not call get_ref_clk() in _debug_uart_init() and reimplement its functionality without external function calls. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-31serial: a37xx: Use CONFIG_BAUDRATE for initializing early debug UARTPali Rohár1-3/+2
CONFIG_BAUDRATE should be used for setting the baudrate for the early debug UART. This replaces current hardcoded 115200 value. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behun <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-24serial: pl011: Enable DEBUG_UART_PL011 in SPLChen Baozi1-2/+6
Commit b81406db51a6 ("arm: serial: Add debug UART capability to the pl01x driver") add supports to use pl01x as a debug UART. However, due to CONFIG_IS_ENABLED macro requires CONFIG_SPL_* prefix, the _debug_uart_init() would not choose TYPE_PL011 in SPL build. This patch fixes the bug by judging CONFIG_DEBUG_UART_PL011 explicitly. Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-24serial: pl011: Resend the character if FIFO is full in debug uartChen Baozi1-1/+2
pl01x_putc() might return -EAGAIN if there was no space in FIFO. In that case, high-level caller should wait until there is space and resend the character. Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-24serial: serial_msm: Delay initialization to let pins stabilizeStephan Gerhold1-0/+4
For some reason, the DragonBoard 410c aborts autoboot immediately if U-Boot is started without LK. It looks like it picks up a single broken character via serial and therefore believes a key was pressed to abort autoboot. After some debugging, it seems like adding some delay after pinctrl setup but before UART initialization fixes the issue. It's also worth mentioning that unlike when booting from LK, the pinctrl setup is actually necessary when booting U-Boot without LK since UART is broken if the pinctrl line is removed. I suspect that reconfiguring the pins might take some time to stabilize and if the UART controller is enabled too quickly it will pick up some random noise. Adding a few milliseconds of delay fixes the issue and shouldn't have any other negative side effects. 3ms seems to be the minimum delay required in my tests, use 5ms instead just to be sure. Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-07-15arm: mvebu: armada-3720: remove unused config optionMarek Behún1-0/+1
The config option CONFIG_DEBUG_UART_CLOCK is not used by Armada 3720's serial driver (it wasn't even before the recent update of that driver). Even if it was used, the value was incorrect (the frequency of the clock is 25 MHz, not 25.8048 MHz). Remove it from config files and set the default value to 0. Signed-off-by: Marek Behún <marek.behun@nic.cz> Cc: Stefan Roese <sr@denx.de> Cc: Pali Rohár <pali@kernel.org> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-08serial: a37xx: Switch to XTAL clock when booting Linux kernelPali Rohár1-0/+67
Unfortunately the UART driver in current Linux for Armada 3700 expects UART's parent clock to be XTAL and calculats baudrate divisor according to XTAL clock. Therefore we must switch back to XTAL clock before booting kernel. Implement .remove method for this driver with DM_FLAG_OS_PREPARE flag set. If current baudrate is unsuitable for XTAL clock then we do not change anything. This can only happen if the user either configured unsupported settings or knows what they are doing and has kernel patches which allow usage of non-XTAL parent clock. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-08serial: a37xx: Use TBG as parent clockPali Rohár1-5/+101
Using TBG clock as parent clock for UART allows us using higher baudrates than 230400. Turris MOX with external FT232RL USB-UART works fine up to 3 MBaud (which is maximum for this USB-UART controller), while EspressoBIN with integrated pl2303 USB-UART also works fine up to 6 MBaud. Slower baudrates with TBG as a parent clock can be achieved by increasing TBG dividers and oversampling divider. When using the slowest TBG clock, minimal working baudrate is 300. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-08serial: a37xx: Fix parent clock rate value and divider calculationPali Rohár1-4/+10
UART parent clock is by default the platform's xtal clock, which is 25 MHz. The value defined in the driver, though, is 25.8048 MHz. This is a hack for the suboptimal divisor calculation Divisor = UART clock / (16 * baudrate) which does not use rounding division, resulting in a suboptimal value for divisor if the correct parent clock rate was used. Change the code for divisor calculation to round to closest value, i.e. Divisor = Round(UART clock / (16 * baudrate)) and change the parent clock rate value to that returned by get_ref_clk(). This makes A3720 UART stable at standard UART baudrates between 1800 and 230400. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-08arm: Remove edb9315a boardTom Rini3-11/+2
These boards have not been converted to CONFIG_DM_USB by the deadline and is also missing conversion to CONFIG_DM. Remove it. This is also the last PL010_SERIAL using board, so remove those references. Cc: Sergey Kostanbaev <sergey.kostanbaev@fairwaves.ru> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-07Merge tag 'dm-pull-6jul21' of https://source.denx.de/u-boot/custodians/u-boot-dmTom Rini1-0/+2
various minor sandbox improvements
2021-07-06serial: serial_msm: Ensure BAM/single character mode are disabledStephan Gerhold1-0/+4
At the moment, the U-Boot serial_msm driver does not initialize the UART_DM_DMEN register with the required value. Usually this does not cause any problems, because there is Qualcomm's LK bootloader running before U-Boot which initializes the register with the correct value. It's important that this register is initialized correctly, because the U-Boot driver does not make use of the BAM/DMA or single character mode functionality of the UART controller. A different bootloader before U-Boot might initialize the register differently. For example, on DragonBoard 410c U-Boot can also be installed to the "aboot" partition (replacing LK entirely). In this case U-Boot is loaded directly by SBL, which seems to use the single-character mode for some reason. In single character mode there is always just one char in the FIFO, instead of the 4 characters expected by msm_serial_fetch(). It also causes issues with "earlycon" later in the Linux kernel, which tries to output 4 chars at once, but only the first char will be written. This causes early UART log in Linux to be corrupted like this: [ 00ano:ameoi .Q1B[ 00ac _idaM00080oo'ahani-lcle._20). 15NdNii 5 SPMSJ20:U2 [ 00rkoolmsamel [ 00Fw ]elamletopsioble [ 00ore instead of [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd030] [ 0.000000] Machine model: Qualcomm Technologies, Inc. APQ 8016 SBC [ 0.000000] earlycon: msm_serial_dm0 at MMIO 0x00000000078b0000 (options '') [ 0.000000] printk: bootconsole [msm_serial_dm0] enabled Make sure to initialize UART_DM_DMEN correctly to fix this issue when loading U-Boot directly after SBL (instead of through LK). There is no functional difference when loading U-Boot through LK since LK also initializes UART_DM_DMEN to 0x0. [1] [1]: https://git.linaro.org/landing-teams/working/qualcomm/lk.git/tree/platform/msm_shared/uart_dm.c?h=dragonboard410c-LA.BR.1.2.7-03810-8x16.0-linaro3#n203 Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-06dm: define LOG_CATEGORY for all uclassPatrick Delaunay1-0/+2
Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-28serial: zynq: Add support for serial parametersKunihiko Hayashi1-0/+68
This adds serial parameters that include stop bit mode, parity mode, and character length. Mark parity and space parity modes are not supported. At the moment, the only path to call setconfig directly is DM testing, however, this affects the size of SPL for DM testing, so it doesn't apply to SPL. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-28serial: Add additional depencies for PL010 and PL011 driversMichal Simek1-2/+2
Both of these drivers are implemented with and without DM that's why more symbols should be handled. The most problematic one is enabling DEBUG_UART_PL011 based on PL01X_SERIAL(DM based) because debug console has type selection based on it. enum pl01x_type type = CONFIG_IS_ENABLED(DEBUG_UART_PL011) ? TYPE_PL011 : TYPE_PL010; Without it pl01x_generic_setbrg() is configuring different registers. Fixes: 4cc24aeaf420 ("serial: Add missing Kconfig dependencies for debug consoles") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24treewide: Convert macro and uses of __section(foo) to __section("foo")Marek Behún1-2/+2
This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-23serial: serial_octeon_bootcmd.c: Add PCI remote console supportStefan Roese3-0/+194
This patch adds the PCI bootcmd feature for MIPS Octeon, which will be used by the upcoming Octeon III NIC23 board support. It enables the use of the "oct-remote-load" and "oct-remote-bootcmd" on host PC's to communicate with the PCIe target and load images into the onboard memory and issue commands. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23serial: serial_octeon_pcie_console.c: Add PCI remote console supportStefan Roese3-0/+379
This patch adds the PCI remote console feature for MIPS Octeon, which will be used by the upcoming Octeon III NIC23 board support. It enables the use of the "oct-remote-console" tool on host PC's to communicate with the PCIe target. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-10arm: Remove apf27 boardTom Rini1-1/+1
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Philippe Reynes <tremyfr@yahoo.fr> Cc: Eric Jarrige <eric.jarrige@armadeus.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-03-27x86: Make coreboot sysinfo available to any x86 boardSimon Glass1-1/+1
It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-20serial: mtk: rewrite the setbrg functionWeijie Gao1-41/+33
Currently the setbrg logic of serial-mtk is messy, and should be rewritten. Also an option is added to make it possible to use highspeed-3 mode for all bauds. The new logic is: 1. If baud clock > 12MHz a) If baud <= 115200, highspeed-0 mode will be used (ns16550 compatible) b) If baud <= 576000, highspeed-2 mode will be used c) any bauds > 576000, highspeed-3 mode will be used 2. If baud clock <= 12MHz Forced highspeed-3 mode a) If baud <= 115200, calculates the divisor using DIV_ROUND_CLOSEST b) any bauds > 115200, the same as 1. c) Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-04serial: ns16550: Handle zero <clock-frequency> valueBin Meng1-0/+2
A working device tree node of ns16550 should never be populated with value zero for the <clock-frequency> property. Unfortunately this is the case for the QEMU ppce500 target. Let's try to assign plat->clock to CONFIG_SYS_NS16550_CLK as the last resort to handle such case. This commit should be reverted when: - The following QEMU patch [1] is merged, and - U-Boot CI has upgraded its QEMU version that contains the fix [1] http://patchwork.ozlabs.org/project/qemu-devel/patch/1612362288-22216-2-git-send-email-bmeng.cn@gmail.com/ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-04serial: ns16550: Correct the base address typeBin Meng1-1/+1
Currently ns16550_serial_assign_base() treats the argument 'base' with type `ulong`. This is incorrect because the base address was obtained from device tree with type `fdt_addr_t` that can represent a physical address larger than 32-bit in a 32-bit system. Fixes: 9e6ce62190b7 ("serial: ns16550: Fix ordering of getting base address") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-03serial: usbtty: Send urb data in correct orderPali Rohár1-9/+3
Function next_urb() selects the last urb data buffer from linked list to which next data from usbtty's puts function should be appended. But to check if TX data still exists it is needed to look at the first urb data buffer from linked list. So check for endpoint->tx_urb (first from the linked list) instead of current_urb (the last from the linked list). Successful call to udc_endpoint_write() may invalidate active urb and allocate new urb in queue which invalidates pointer returned by next_urb() function. So call next_urb() prior putting data into urb buffer and call it every time after using udc_endpoint_write() function to prevent sending data from usbtty's puts function in incorrect order. This patch fixes issue that usbtty code does not transmit data when they are waiting in the tx queue. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
2021-03-03serial: usbtty: Fix puts functionPali Rohár1-2/+2
This function has incorrect implementation of prepending CR prior LF. Without this patch it prepended CR prior whole string which is going to be written and let LF without leading CR. Fix this issue by inserting CR at correct place to make output on usbtty serial console more readable. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
2021-02-26Merge https://gitlab.denx.de/u-boot/custodians/u-boot-samsungTom Rini2-1/+8
2021-02-23Merge tag 'xilinx-for-v2021.04-rc3' of ↵Tom Rini1-1/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
2021-02-23clk: zynq: Add dummy clock enable functionMichal Simek1-1/+1
A lot of Xilinx drivers are checking -ENOSYS which means that clock driver doesn't have enable function. Remove this checking from drivers and create dummy enable function as was done for clk_fixed_rate driver by commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23serial: s5p: Allow independent selectionMark Kettenis2-1/+8
Currently support for the Samsung serial port driver is part of CONFIG_S5P which controls selection of several drivers for the S5P family. Give it its own config option such that we can use it on other SoCs as well. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Patrick Wildt <patrick@blueri.se> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2021-02-15Merge branch '2021-02-02-drop-asm_global_data-when-unused'Tom Rini22-0/+22
- Merge the patch to take <asm/global_data.h> out of <common.h>
2021-02-15arm: Remove mx35pdk boardTom Rini1-1/+1
This board has not been converted to CONFIG_DM_MMC by the deadline of v2019.04, which is almost two years ago. In addition there are other DM migrations it is also missing. Remove it. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefano Babic <sbabic@denx.de>
2021-02-03serial: sifive: Cast dev_read_addr() with uintptr_tBin Meng1-1/+1
dev_read_addr() returns fdt_addr_t which is now a 64-bit address. In a 32-bit build, this causes the following warning seen when building serial_sifive.c: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Cast the return value with uintptr_t. Signed-off-by: Bin Meng <bin.meng@windriver.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass22-0/+22
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-27serial: a3720: Implement pending method for output directionPali Rohár1-2/+8
To check if some output characters are waiting either in Transmitter Holding Register or Transmitter Shift Register we need to look at TX_EMPTY bit of UART Status Register. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-24serial: add uart driver for MediaTek MT7620 SoCWeijie Gao3-0/+267
This patch adds uart support for MediaTek MT7620 and earlier SoCs. The UART used by MT7620 is incompatible with the ns16550a driver. All registers of this UART have different addresses. A special 16-bit register for Divisor Latch is used to set the baudrate instead of the original two 8-bit registers (DLL and DLM). The driver supports of-platdata which is useful for tiny SPL. Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-16drivers: serial: probe all uart devicesVabhav Sharma2-0/+25
U-Boot DM model probe only single device at a time which is enabled and configured using device tree or platform data method. PL011 UART IP is SBSA compliant and firmware does the serial port set-up, initialization and let the kernel use UART port for sending and receiving characters. Normally software talk to one serial port time but some LayerScape platform require all the UART devices enabled in Linux for various use case. Adding support to probe all enabled serial devices like SBSA compliant PL011 UART ports probe and initialization by firmware. Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-01-13serial: stm32: define LOG_CATEGORYPatrick Delaunay1-0/+3
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-06Merge tag 'xilinx-for-v2021.04' of ↵Tom Rini1-1/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.04 arm64: - DT updates microblaze: - Add support for NOR device support spi: - Fix unaligned data write issue nand: - Minor code change xilinx: - Fru fix in limit calculation - Fill git repo link for all Xilinx boards video: - Add support for seps525 spi display tools: - Minor Vitis file support cmd/common - Minor code indentation fixes serial: - Uartlite debug uart initialization fix
2021-01-06Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextTom Rini19-123/+110
Driver model: make some udevice fields private Driver model: Rename U_BOOT_DEVICE et al. dtoc: Tidy up and add more tests ns16550 code clean-up x86 and sandbox minor fixes for of-platdata dtoc prepration for adding build-time instantiation
2021-01-06Merge tag 'v2021.01-rc5' into nextTom Rini1-1/+1
Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05dm: Rename U_BOOT_DRIVER_ALIAS to DM_DRIVER_ALIASSimon Glass1-3/+3
We use the U_BOOT_ prefix (i.e. U_BOOT_DRIVER) to declare a driver but in every other case we just use DM_. Update the alias macros to use the DM_ prefix. We could perhaps rename U_BOOT_DRIVER() to DM_DRIVER(), but this macro is widely used and there is at least some benefit to indicating it us a U-Boot driver, particularly for code ported from Linux. So for now, let's keep that name. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05dm: Rename U_BOOT_DEVICE() to U_BOOT_DRVINFO()Simon Glass1-1/+1
The current macro is a misnomer since it does not declare a device directly. Instead, it declares driver_info record which U-Boot uses at runtime to create a device. The distinction seems somewhat minor most of the time, but is becomes quite confusing when we actually want to declare a device, with of-platdata. We are left trying to distinguish between a device which isn't actually device, and a device that is (perhaps an 'instance'?) It seems better to rename this macro to describe what it actually is. The macros is not widely used, since boards should use devicetree to declare devices. Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is declaring a new driver_info record, not a device. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05dm: core: Access device flags through functionsSimon Glass1-1/+1
At present flags are stored as part of the device. In preparation for storing them separately, change the access to go through inline functions. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05sandbox: serial: Move priv into a header fileSimon Glass1-15/+1
Move this struct into a header file so that dtoc can include it in its dt-platdata.c file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05dm: Use access methods for dev/uclass private dataSimon Glass15-54/+55
Most drivers use these access methods but a few do not. Update them. In some cases the access is not permitted, so mark those with a FIXME tag for the maintainer to check. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
2021-01-05serial: Rename ns16550 functions to lower caseSimon Glass2-19/+19
Lower case should be used for function names. Update this driver and its callers accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05serial: Update NS16550_t and struct NS16550Simon Glass6-36/+36
Typedefs should not be used in U-Boot and structs should be lower case. Update the code to use struct ns16550 consistently. Put a header guard on the file while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-04serial: uartlite: Fix uninitialized ret in debug uartliteAshok Reddy Soma1-1/+1
Endianness detection is checked against uninitialized ret variable. Assign ret with read value from status register to fix this. Fixes: 31a359f87eaa ("serial: uartlite: Add support to work with any endianness") Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-19 21:38:40 +0300