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path: root/drivers/spi/ich.c
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2021-07-15spi: ich: Don't require the PCHSimon Glass1-2/+2
When booting from coreboot we may not have a PCH driver available. The SPI driver can operate without the PCH but currently complains in this case. Update it to continue to work normally. The only missing feature is memory-mapping of SPI-flash contents, which is not essential. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-01-05x86: spl: Move priv/plat structs to headersSimon Glass1-11/+0
With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass1-14/+14
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass1-2/+2
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass1-8/+8
Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass1-3/+3
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass1-2/+2
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29x86: apl: Enable SPI flash in TPL with APL_SPI_FLASH_BOOTSimon Glass1-1/+3
At present, enabling CONFIG_APL_SPI_FLASH_BOOT does not build since SPI and SPI flash are not enabled for TPL. Add a condition to fix this and tidy up a build warning in the SPI-flash driver. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-02x86: spi: Rewrite logic for obtaining the SPI memory mapSimon Glass1-15/+88
At present this logic does not work on link and samus, since their SPI controller is not a PCI device, but a child of the PCH. Unfortunately, fixing this involves a lot of extra logic. Still, this was requested in the review of the fix-up patch, so here it is. Fixes: 92842147c31 ("spi: ich: Add support for get_mmap() method") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
2020-05-19common: Drop linux/bitops.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop linux/delay.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop log.h from common headerSimon Glass1-0/+1
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop bootstage.h from common headerSimon Glass1-0/+1
Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-03spi: ich: Drop while loop in hardware sequencing erase caseWolfgang Wallner1-10/+2
When ich_spi_exec_op_hwseq() is called to erase a 4k block (opcode = SPINOR_OP_BE_4K), it expects to find a length value in op->data.nbytes, but that value is always 0. As a result, the while loop is never executed and no erase is carried out. Fix this by dropping the loop code entirely, only keeping the relevant parts of the loop body. See http://patchwork.ozlabs.org/patch/1222779/ for more detailed background information and discussion. Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15spi: ich: Add Apollo Lake supportSimon Glass1-5/+14
Add support for Apollo Lake to the ICH driver. This involves adjusting the mmio address and skipping setting of the bbar. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15spi: ich: Add TPL supportSimon Glass1-4/+44
In TPL we want to reduce code size and support running with CONFIG_PCI disabled. Add special code to handle this using a fixed BAR programmed into the SPI on boot. Also cache the SPI flash to speed up boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15spi: ich: Add support for get_mmap() methodSimon Glass1-0/+32
Add this method so that the memory-mapped location of the SPI flash can be queried. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15spi: ich: Support hardware sequencingSimon Glass1-3/+206
Apollo Lake (APL) only supports hardware sequencing. Add support for this into the SPI driver, as an option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15spi: ich: Support of-platdata for fast-spiSimon Glass1-3/+15
The Intel Fast SPI interface is similar to ICH. Add of-platdata support for this using the "intel,fast-spi" compatible string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15spi: ich: Correct max-size bug in ich_spi_adjust_size()Simon Glass1-3/+5
This incorrectly shortens read operations if there is a maximum write size but no maximum read size. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15spi: ich: Add mmio_base to struct ich_spi_platdataSimon Glass1-14/+13
It is useful to store the mmio base in platdata. It reduces the amount of casting needed. Update the code and move the struct to the C file at the same time, as we will need to use with of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15spi: ich: Various small tidy-upsSimon Glass1-9/+8
Use debug() instead of printf() to reduce code size and change a bool return value to the use the 'bool' type. Also drop the global data declaration since it not actually used. Finally, set the log category. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15spi: ich: Fix header orderSimon Glass1-2/+2
Move the header files into the right order. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15spi: ich: Convert to livetreeSimon Glass1-17/+5
Use dev_get_driver_data() to obtain the device type. It has the same effect and is shorter. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15spi: ich: Move the protection/lockdown code into a functionSimon Glass1-20/+43
Reduce the size of the probe function but putting this code into its own function. Also remove the assumption that the PCH is always a parent of the SPI controller, as this is not the case APL platforms. Use driver model to find the PCH instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15spi: ich: Move init function just above probe()Simon Glass1-61/+61
It is annoying to have some of the init code in a different part of the file. Move ich_init_controller() to just above probe() to keep things together. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15spi: Correct operations check in dm_spi_xfer()Simon Glass1-8/+1
At present we have to have an xfer() method even if it does nothing. This is not correct, so fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09x86: ich-spi: Convert driver to spi-mem opsBernhard Messerklinger1-166/+92
With the introduction of the new spi-mem model operations changed slightly. The new spi-mem operations make things a bit easier to handle for ich-spi flash interface. This patch converts the ich-spi driver by using spi-mem operations. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested on Intel CrownBay and MinnowMax Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fix compiler warnings when building the driver for 64-bit] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini1-2/+1
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-27spi: ich: Lock down controller settings if requiredBin Meng1-0/+22
Some Intel FSP (like Braswell) does SPI lock-down during the call to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done, it's bootloader's responsibility to configure the SPI controller's opcode registers properly otherwise SPI controller driver doesn't know how to communicate with the SPI flash device. Rather than passively doing the opcode configuration, let's add a simple DTS property "intel,spi-lock-down" and let the driver call the opcode configuration function if required by such FSP. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-02x86: ich-spi: Clear atomic preop only when SPI settings are not lockedBin Meng1-1/+2
The atomic preop register can only be written when SPI settings are not locked, otherwise it's read-only. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2017-09-02x86: ich-spi: Remove useless assignment in ich_spi_xfer()Bin Meng1-2/+0
In ich_spi_xfer() when the driver presets control fields, control variable gets assigned twice. Apparently only the last assignment takes effect. Remove the other one. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-24x86: ich-spi: Move opcode registers configuration to another routineBin Meng1-6/+16
At present the ICH SPI opcode registers configuration is done in the ich_spi_remove() routine, a little bit weird but that's how current. Linux MTD driver works. This changes to move the opcode registers configuration to a separate routine ich_spi_config_opcode() which might be called by U-Boot itself as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-24x86: ich-spi: Don't read cached lock statusBin Meng1-6/+23
At present the ICH SPI controller driver reads the controller lock status from its register in the probe routine and saves the lock status to a member of priv. Later the driver uses the cached status from priv to judge whether the controller setting is locked and do different setup. But such logic is only valid when there is only the SPI controller driver that touches the SPI hardware. In fact the lock status change can be trigged outside the driver, eg: during the fsp_notify() call when Intel FSP is used. This changes the driver to read the lock status every time when an SPI transfer is initiated instead of reading the cached one. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-24x86: ich-spi: Remove unnecessary assignment in ich_init_controller()Bin Meng1-1/+0
There is no need to do another assignment to ich7_spi. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-24x86: ich-spi: Remove spi_write_protect_region()Bin Meng1-50/+0
This routine is not called anywhere. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-17spi: ich: Configure SPI BIOS parameters for Linux upon U-Boot exitStefan Roese1-0/+18
This patch adds a remove function to the Intel ICH SPI driver, that will be called upon U-Boot exit, directly before the OS (Linux) is started. This function takes care of configuring the BIOS registers in the SPI controller (similar to what a "standard" BIOS or coreboot does), so that the Linux MTD device driver is able to correctly read/write to the SPI NOR chip. Without this, the chip is not detected at all. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Jagan Teki <jteki@openedev.com>
2017-02-08dm: core: Replace of_offset with accessorSimon Glass1-3/+3
At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-21spi: Use mode for rx mode flagsJagan Teki1-4/+2
Make rx mode flags as generic to spi, earlier mode_rx is maintained separately because of some flash specific code. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-02-05dm: pch: Rename get_sbase op to get_spi_baseBin Meng1-1/+1
Spell out 'sbase' to 'spi_base' so that it looks clearer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2016-02-05spi: ich: Change PCHV_ to ICHV_Bin Meng1-7/+7
The ICH SPI controller supports two variants, one of which is ICH7 compatible and the other is ICH9 compatible. Change 'pch_version' to 'ich_version' to better match its original name. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Simon Glass <sjg@chromium.org>
2016-02-05spi: ich: Use compatible strings to distinguish controller versionBin Meng1-4/+24
At present ich spi driver gets the controller version information via pch, but this can be simply retrieved via spi node's compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Simon Glass <sjg@chromium.org>
2016-02-05spi: ich: Some clean upBin Meng1-33/+5
This cleans up the ich spi driver a little bit: - Remove struct ich_spi_slave that is not referenced anywhere - Remove ending period in some comments - Move struct ich_spi_platdata and struct ich_spi_priv to ich.h - Add #ifndef _ICH_H_ .. in ich.h Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-24dm: x86: spi: Convert ICH SPI driver to driver model PCI APISimon Glass1-116/+36
At present this SPI driver works by searching the PCI buses for its peripheral. It also uses the legacy PCI API. In addition the driver has code to determine the type of Intel PCH that is used (version 7 or version 9). Now that we have proper PCH drivers we can use those to obtain the information we need. While the device tree has a node for the SPI peripheral it is not in the right place. It should be on the PCI bus as a sub-peripheral of the LPC device. Update the device tree files to show the SPI controller within the PCH, so that PCI access works as expected. This patch includes Bin's fix-up patch from here: https://patchwork.ozlabs.org/patch/569478/ Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24spi: ich: Separate out the read/write trace from normal debuggingSimon Glass1-9/+15
The trace is seldom useful for basic debugging. Allow it to be enabled separately so that it is easier to see the more important init and error debug messages. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-13spi: Rename op_mode_rx to mode_rxJagan Teki1-1/+1
Since spi rx mode macro's are renamed to simple and meaninfull, this patch will rename the respective structure members. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Rename SPI_OPM_RX_* to SPI_RX_*Jagan Teki1-1/+1
SPI_OPM_RX_AS - SPI_RX_SLOW SPI_OPM_RX_AF - SPI_RX_FAST SPI_OPM_RX_DOUT - SPI_RX_DUAL SPI_OPM_RX_QOF - SPI_RX_QUAD Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Rename SPI_TX_BP|QPP to SPI_TX_BYTE|QUADJagan Teki1-1/+1
Since SPI_TX_* are spi_slave{} members so use spi protocol notation instead spi flash programming, like SPI_TX_BP => SPI_TX_BYTE SPI_TX_QPP => SPI_TX_QUAD Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Use mode instead of op_mode_txJagan Teki1-1/+1
Used mode member from spi_slave{} instead of op_mode_tx. Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-28Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini1-2/+2
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