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2019-10-08pinctrl: imx: use devfdt_get_addr_size_indexPeng Fan1-3/+1
fdtdec_get_addr_size could not parse addr/size correctly is using address-cells 2 and size-cells 2 on an ARM32 SoC. So switch to use devfdt_get_addr_size_index. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-07NET: DW: fix regression for ARC boardsEugeniy Paltsev1-0/+1
The commit 642b80d256e ("net: designware: drop compatible altr, socfpga-stmmac") breaks designware ethernet for all ARC boards. It removes "altr, socfpga-stmmac" compatible from "drivers/net/designware.c" without changing compatible in the boards which use it. Fix that by adding "snps,arc-dwmac-3.70a" compatible string to "drivers/net/designware.c" and using it in ARC boards device tree. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2019-10-03dm: core: Correct bad cast in ofnode_get_addr_size_index()Simon Glass1-2/+5
At present this code passes an fdt_addr_t pointer as a u64 pointer which is not safe, since sizeof(fdt_addr_t) may be 4, e.g. with sandbox. Correct this to avoid a stack corruption problem. Fixes: e679d03b08 (core: ofnode: Add ofnode_get_addr_size_index) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct one typo in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-03dm: core: Correct low cell in ofnode_read_pci_addr()Simon Glass1-1/+1
This reads the low cell of the PCI address from the wrong cell. Fix it. Also fix the function that this code came from. Fixes: 9e51204527 (dm: core: Add operations on device tree references) Fixes: 4ea5243a3a (fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT) Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-22Merge tag 'fixes-for-2019.10' of ↵Tom Rini1-1/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-video.git - fix sunxi LCD clock divider - fix splash logo with DM_VIDEO and CONFIG_VIDEO_LOGO - fix splash banner output with DM_VIDEO
2019-09-21sunxi: video: HDMI: Fix LCD clock dividerMark Kettenis1-1/+1
Currently we may end up with an LCD clock divider that differs from the HDMI PHY clock divider if we can't exactly match the pixel clock. Fix this by using DIV_ROUND_UP to calculate the divider. This works since the PLL is chosen such that the resulting pixel clock is never higher than the requested pixel clock. Fixes: 1feed358ed15 ("sunxi: video: HDMI: Fix clock setup") Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2019-09-21Merge tag 'u-boot-rockchip-20190920' of ↵Tom Rini1-5/+10
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Fix rk3288 tinker and evb SPL boot fail - Enable get sn from cpuid for rk3399 rockpro64 board
2019-09-19watchdog: omap_wdt: Fix WDT target reset when booted from emmcSuniel Mahesh1-1/+1
AM335X based beaglebone black target gets reset by DM converted watchdog if booted from emmc around 60sec. Fixed this by moving driver's private struct variable initialization at different places in the driver to driver's probe. Tested on Beaglebone Black. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Fixes: 7659ea32 ("watchdog: omap_wdt: Convert watchdog driver to use DT and DM") Reported-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Suniel Mahesh <sunil.m@techveda.org> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2019-09-19rtc: ds3231/ds3232: fix coding styleBiwen Li1-1/+2
The patch fixes coding style Signed-off-by: Biwen Li <biwen.li@nxp.com>
2019-09-19ram: rk3288: Initialize dram for TPL buildsJagan Teki1-5/+10
Few of the rk3288 boards like tinker, vyasa are using TPL, SPL bootchain so the dram initialization must needed during TPL stage. So add proper ifconstruct to satisfy both TPL, SPL and SPL-only bootchain boards. This eventually fixing TPL to SPL handoff, otherwise missing dram initilaztion at TPL stage would leads to SPL hang. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-16Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini3-17/+37
- Add emmc hs200 support - Few bug fixes related to serdes, I2C, ethernet, etc
2019-09-16Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spiTom Rini10-91/+228
- fix mvebu_a3700_spi clock prescale (Marek Behún) - unmark MXS_SPI, DEPRECATED (Lukasz) - add spi_write_then_read (Jagan) - fix SST26* flash ICs (Eugeniy) - fix soft_spi data abort (Christophe)
2019-09-16mtd: spi-nor: enable protection ops for SST26 flash seriesEugeniy Paltsev1-4/+4
Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework) performs switch from previous 'spi_flash' infrastructure without proper testing/investigations which results in a regressions for SST26 flash series. Enable protection ops for SST26 flash series which were previously enabled by Commit 3d4fed87a5fa (mtd: sf: Add support of sst26wf* flash ICs protection ops) Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16mtd: spi-nor: add missing SST26* flash IC protection opsEugeniy Paltsev2-0/+182
Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework) performs switch from previous 'spi_flash' infrastructure without proper testing/investigations which results in a regressions for SST26 flash series. Add missing SST26* flash IC protection ops which were introduced previously by Commit 3d4fed87a5fa (mtd: sf: Add support of sst26wf* flash ICs protection ops) Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16mtd: spi: Drop sf.cJagan Teki3-72/+1
spi_write_then_read, will manage to do the respective spi_xfer based on the tx_buf, rx_buf so drop the legacy spi_flash_read/write/cm code. Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16mtd: spi_dataflash: Use spi read then writeJagan Teki1-9/+13
Now, we have spi_write_then_read routine that would handle spi_xfer handling based on the tx_buf and rx_buf parameters. So, replace individual flash read/write/cmd transfer call with spi_write_then_read. Cc: Egnite GmbH <info@egnite.de> Cc: Daniel Gorsulowski <daniel.gorsulowski@esd.eu> Cc: Ilko Iliev <iliev@ronetix.at> Cc: Marek Vasut <marex@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Alison Wang <alison.wang@nxp.com> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16spi: Add spi_write_then_readJagan Teki1-0/+24
Add support for SPI synchronous write followed by read, this is common interface call from spi-nor to spi drivers. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
2019-09-16spi: Kconfig: Unmark DEPRECATED for MXS_SPILukasz Majewski1-1/+0
MXS_SPI driver now partially converted into driver-model, so unmark the DEPRECATED option for the same. Signed-off-by: Lukasz Majewski <lukma@denx.de> [jagan: update the commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16spi: soft_spi: Fix data abort if slave is not probedChristophe Kerello1-2/+2
In case spi_get_bus_and_cs callback is used, spi bus is first probed then slave devices are probed. To avoid a data abort in soft_spi probe function, we need to check that (slave != NULL). If slave is NULL, cs_flags and clk_flags will be initialized with respectively GPIOD_ACTIVE_LOW and 0. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16spi: mvebu_a3700_spi: Fix clock prescale computationMarek Behún1-3/+2
The prescaler value computation can yield wrong result if given 0x1f at the beginning: the value is computed to be 0x20, but the maximum value the register can hold 0x1f, so the actual stored value in this case is 0, which is obviously wrong. Set the upper bound of the value to 0x1f with the min macro. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-15Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini11-33/+49
- Assorted bugfixes
2019-09-13soc: ti: k3-navss-ringacc: fix k3_nav_ringacc_ring_reset_dmaVignesh Raghavendra1-1/+3
In case dma_ring_reset_quirk is not set the k3_ringacc_ring_reset_dma will just exit without ring reset. Fix it, by adding ring reset call in case dma_ring_reset_quirk is not. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-09-12watchdog: sp805_wdt: add expire_now methodThomas Schaefer1-1/+9
Add sp805_wdt_expire_now function. expire_now method is required by U_BOOT_DRIVER. Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12mmc: fsl_esdhc: Add emmc hs200 supportYinbo Zhu1-15/+19
Add eMMC hs200 mode for ls1028a, ls1012a, lx2160a. This increases eMMC performance. Tuning procedure is currently not supported. Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12mmc: Kconfig: Add FSL_ESDHC_USE_PERIPHERAL_CLK optionYinbo Zhu1-1/+9
NXP fsl_esdhc controller supports two reference clocks: platform clock and peripheral clock Peripheral clock can provide higher clock frequency which is required to be used for tuning of SD UHS mode and eMMC HS200/HS400 modes. Peripheral clock is enabled by default by defining config option FSL_ESDHC_USE_PERIPHERAL_CLK if eMMC HS200/HS400 modes are supported. Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-11rockchip: clk: rk3399: remove clk_enable()Kever Yang1-37/+0
There is no real driver for clk enable/disable now, and we actually don't need it now, remove it so that not waste CPU cycles and code size. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11rockchip: clk: rk3368: remove clk_enable()Kever Yang1-19/+0
There is no real driver for clk enable/disable now, and we actually don't need it now, remove it so that not waste CPU cycles and code size. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11rockchip: clk: rk3328: remove clk_enable()Kever Yang1-12/+0
There is no real driver for clk enable/disable now, and we actually don't need it now, remove it so that not waste CPU cycles and code size. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11rockchip: clk: rk3288: remove clk_enable()Kever Yang1-23/+0
There is no real driver for clk enable/disable now, and we actually don't need it now, remove it so that not waste CPU cycles and code size. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11usb: ohci-generic: don't probe fail if there is no clk_enable() opsKever Yang1-1/+1
Some clock driver do not have a clk_enable() call back, and we should not treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk() do not return fail if ret value is '-ENOSYS' Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-09-11usb: ehci-generic: don't probe fail if there is no clk_enable() opsKever Yang1-1/+1
Some clock driver do not have a clk_enable() call back, and we should not treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk() do not return fail if ret value is '-ENOSYS' Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-09-11usb: musb_hcd: fix compilation errorJean-Jacques Hiblot1-2/+2
commit 65c1f9820c8f79f "usb: Add nonblock argument to submit_int_msg" breaks the musb_hcd driver. Fixing it by adding the missing argument Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-09-11dwc2: use the nonblock argument in submit_int_msgMichal Suchanek1-1/+1
An USB 1.1 keyboard connected to dwc2 through a high-speed hub does not report status until it changes. With this patch you can enable keyboard by pressing a key while USB devices are probed. Without a keypress no state is reported and the probe times out. We don't want to wait for a keypress or timeout while polling for keypresses so implement an int_msg nonblock variant that exits early on error. Signed-off-by: Michal Suchanek <msuchanek@suse.de>
2019-09-11usb: Add nonblock argument to submit_int_msgMichal Suchanek10-30/+46
This will be used to implement non-blocking keyboard polling in case of errors. Signed-off-by: Michal Suchanek <msuchanek@suse.de>
2019-09-10usb: xhci-dwc3: Add support for dis_u2_susphy_quirkNeil Armstrong1-0/+3
This quirk is necessary for the Amlogic GXL SoCs otherwise the Port 2 PHY doesn't get out of suspend and U-Boot resets the board after: XHCI timeout on event type 33... cannot recover. BUG: failure at drivers/usb/host/xhci-ring.c:474/xhci_wait_for_event()! BUG! This quirk is also handled in the dwc3 core code, but until the xhci-dwc3 driver uses the dwc3 core, the quirk must be handled here to fix USB support on the Amlogic libretech-cc and libretech-ac board when a device is only plugged in the OTG port. Cc: Yuri Frolov <crashing.kernel@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Fixes: dc9cdf859e ("usb: dwc3: Add DWC3 controller driver support") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-09Merge tag 'mmc-9-6-2019' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini15-57/+206
Bug fixes to mmc_spi Add Aspeed SD driver Fix dw_mmc timeout calculation Fix timeout values passed to mmc_wait_dat0 sdhci dt caps/mask update [trini: Fix evb-ast2500_defconfig CONFIG_MMC line] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-09-07Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini4-65/+113
- Initial DM conversion
2019-09-07Merge tag 'rpi-next-2019.10' of https://github.com/mbgg/u-bootTom Rini2-7/+17
- fix mailbox status register used for polling - fix bcm2835_sdhost to wait long enough for a transfer to complete - increase kernel image size from 8 MB to 64 MB on arm64 - add support for RPi4 - add prefixes for raspberry pi related stuff to git-mailrc
2019-09-06mmc: bcm283x: Add support for bcm2711 device in bcm2835_sdhciMatthias Brugger1-2/+10
The bcm2711 has two emmc controllers. The difference is the clocks they use. Add support for the second emmc controller. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Andrei Gherzan <andrei@balena.io>
2019-09-06mmc: bcm2835-host: Fix wait_transfer_completeRaul Benet1-5/+7
Function bcm_2835_wait_transfer_complete() is not waiting long enough. The previous code was claiming to wait for ~1 seconds, but as it depends on register reads it's time actually varies. Some cards require wait times of up to ~56 ms to perform the command 'saveenv' on an EXT4 partition. Re-implement the loop exit condition to use get_timer() which allows to specify the wait time in more reliable manner. Set the maximum wait time to the originally intended 1 second. Signed-off by: Raul Benet <raul.benet_at_kaptivo.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-09-06mmc: sdhci: Add support for dt caps & caps maskT Karthik Reddy1-9/+14
The sdhci capabilities registers can be incorrect. The sdhci-caps-mask and sdhci-caps dt properties specify which bits of the registers are incorrect and what their values should be. This patch makes the sdhci driver use those properties to correct the caps. Also use "dev_read_u64_default" instead of "dev_read_u32_array" for caps mask. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-09-06dm: core: Add functions to read 64-bit dt propertiesT Karthik Reddy2-1/+11
This patch adds functions dev_read_u64_default & dev_read_u64 to read unsigned 64-bit values from devicetree. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-05dm: mmc_spi: Fix NULL pointer dereference in mmc_spi_bind()Bin Meng1-15/+20
The mmc_spi driver's priv is not available in its bind phase(). Use platdata instead. Fixes: 05e35d429745 ("mmc: mmc_spi: Re-write driver using DM framework") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-09-05mmc: dw_mmc: fix timeout calculate methodKever Yang1-2/+3
There are two cases not been considered: - use uint for timeout, it will overflow when size bigger than 512KB for it *8*1000 at the beginning, but we may use size up to 32MB; The 'timeout' will overflow if size bigger than 51.2MB after this fix, which should be enough for U-Boot; - The timeout is using clock speed for data rate, but the device may not have such high speed, eg. clock is 52MHz while the device write speed may be less than 10MB/s, and we may use up to 150MHz clock. Fix them in this patch, the max timeout is about 6500 when size is 32MB after fix. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-05mmc: Add Aspeed SD controller driverEddie James3-0/+102
Add support for the Aspeed SD host controller engine. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
2019-09-05clk: aspeed: Add support for SD clockEddie James2-0/+29
Add code to enable the SD clock on the ast2500 SoC. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Eddie James <eajames@linux.ibm.com>
2019-09-05mmc: Rename timeout parameters for clarificationSam Protsenko5-26/+27
It's quite hard to figure out time units for various function that have timeout parameters. This leads to possible errors when one forgets to convert ms to us, for example. Let's rename those parameters correspondingly to 'timeout_us' and 'timeout_ms' to prevent such issues further. While at it, add time units info as comments to struct mmc fields. This commit doesn't change the behavior, only renames parameters names. Buildman should report no changes at all. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2019-09-05mmc: Fix timeout values passed to mmc_wait_dat0()Sam Protsenko1-2/+2
mmc_wait_dat0() expects timeout argument to be in usec units. But some overlying functions operate on timeout in msec units. Convert timeout from msec to usec when passing it to mmc_wait_dat0(). This fixes 'avb' commands on BeagleBoard X15, because next chain was failing: get_partition() -> mmc_switch_part() -> __mmc_switch() -> mmc_wait_dat0() when passing incorrect timeout from __mmc_switch() to mmc_wait_dat0(). Fixes: bb98b8c5c06a ("mmc: During a switch, poll on dat0 if available and check the final status") Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Eugeniu Rosca <rosca.eugeniu@gmail.com> Tested-by: Eugeniu Rosca <rosca.eugeniu@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Tested-by: Igor Opaniuk <igor.opaniuk@gmail.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2019-09-05dm: mmc: remove unused U_BOOT_DRIVER(mmc)Andy Yan1-4/+0
When look through the code, I found this bare metal drives is not used, so remove it. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-09-04net: macb: Fix rx buffer cache handlingStefan Roese1-2/+4
With commit c6d07bf440bc ("net/macb: increase RX buffer size for GEM") ethernet support does not work any more with d-cache enabled on the AT91SAM. The reason is, that MACB_RX_BUFFER_SIZE was changed from 4096 to 128 but this change was not refected in the rx_buffer flush and invalidate functions, as these also use this macro. This patch now fixes this by calculating the rx buffer size correctly again in those functions. With this change, ethernet works again reliably on my AT91SAM board. Signed-off-by: Stefan Roese <sr@denx.de> Fixes: c6d07bf440bc ("net/macb: increase RX buffer size for GEM") Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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