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2022-03-19Merge tag 'dm-pull-18mar22' of ↵Tom Rini2-4/+9
https://source.denx.de/u-boot/custodians/u-boot-dm into next binman FIT improvements various minor sandbox improvements
2022-03-19sandbox: Slow down the LCD sync rateSimon Glass1-1/+1
There is seldom a need to refresh at 100Hz and it uses a lot of CPU. Reduce the rate to 10Hz which seems to be adequate. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-19sandbox: Open host file for read-only access if neededSimon Glass1-3/+8
Some files cannot be written but read-only access is still useful for tests. Add a fallback to read-only access when needed. This is useful in CI when opening a large data file provided by docker, where read/write access would result in copying the file, thus needing a lot of extra disk space. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-18net: fec_mxc: Drop CONFIG_FEC_XCV_TYPETom Rini1-7/+3
With all boards now using DM_ETH we determine the value for CONFIG_FEC_XCV_TYPE at run time, except in the case of the default fall-back. Set the fallback directly now. Cc: Fabio Estevam <festevam@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18net: fec_mxc: Remove non-DM_ETH codeTom Rini1-245/+0
Now that all boards have been converted, remove the non-DM_ETH code. Cc: Fabio Estevam <festevam@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-16Merge tag 'xilinx-for-v2022.07-rc1' of ↵Tom Rini22-41/+1206
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2022.07-rc1 microblaze: - Add support for reserved memory xilinx: - Update FRU code with MAC reading zynqmp: - Remove double AMS setting - DT updates (mostly for SOMs) - Add support for zcu106 rev 1.0 zynq: - Update nand binding nand: - Aligned zynq_nand to upstream DT binding net: - Add support for ethernet-phy-id mmc: - Workaround CD in zynq_sdhci driver also for ZynqMP - Add support for dynamic/run-time SD config for SOMs gpio: - Add driver for slg7xl45106 firmware: - Add support for dynamic SD config power-domain: - Update zynqmp driver with the latest firmware video: - Add skeleton driver for DP and DPDMA i2c: - Fix i2c to work with QEMU pinctrl: - Add driver for zynqmp pinctrl driver
2022-03-15Merge tag 'v2022.04-rc4' into nextTom Rini26-159/+1176
Prepare v2022.04-rc4
2022-03-14phy: cadence: Sierra: Move the link operations from serdes phy to link deviceAswath Govindraju1-39/+20
In commit 6f46c7441a9f ("phy: cadence: Sierra: Add a UCLASS_PHY device for links"), a separate udevice of type UCLASS_PHY was created for each link. Therefore, move the corresponding link operations under the link device. Also, change the uclass of sierra phy to UCLASS_MISC as it is no longer the phy device. Fixes: 6f46c7441a9f ("phy: cadence: Sierra: Add a UCLASS_PHY device for links") Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Reviewed-by: Georgi Vlaev <g-vlaev@ti.com>
2022-03-14rockchip: sdhci: Fix RK3399 eMMC PHY power cyclingAlper Nebi Yasak1-10/+66
The Rockchip RK3399 eMMC PHY has to be power-cycled while changing its clock speed to some higher speeds. This is dependent on the desired SDHCI clock speed, and it looks like the PHY should be powered off while setting the SDHCI clock in these cases. Commit ac804143cfd1 ("mmc: rockchip_sdhci: add phy and clock config for rk3399") attempts to do this in the set_ios_post() hook by setting the SDHCI clock once more while the PHY is turned off/on as necessary, as the SDHCI framework does not provide a way to override how it sets its clock. However, the commit breaks reinitializing the eMMC on a few boards including chromebook_kevin and reportedly ROCKPro64. This patch reworks the power cycling to utilize the SDHCI framework slightly better (using the set_control_reg() hook to power off the PHY and set_ios_post() hook to power it back on) which happens to fix the issue, at least on a chromebook_kevin. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-14pinctrl: zynqmp: Add pinctrl driverAshok Reddy Soma3-0/+655
Add pinctrl driver for Xilinx ZynqMP SOC. This driver is compatible with linux device tree parameters for configuring pinmux and pinconf. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/2d7eefa83c8c0129f7243a25de56a289e948f6c6.1645626183.git.michal.simek@xilinx.com
2022-03-12Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spiTom Rini7-9/+594
- sunXi SPI fixups (Andre) - bcm iproc qspi (Rayagonda)
2022-03-11mtd: spi-nor-ids: Enable quad read for Gigadevice gd25lq128Niklas Cassel1-1/+1
The Gigadevice gd25lq128 serial flash exists in different versions, all which identify themselves using the same JEDEC id. gd25lq128c: https://www.gigadevice.com/datasheet/gd25lq128 gd25lq128d: https://www.gigadevice.com/datasheet/gd25lq128d However, all versions support quad read, so enable it. Tested and verified on the Sipeed MAix BiT board. Fixes: 30b9a28a3f2d ("mtd: spi-nor-ids: Add Gigadevice gd25lq128 ID") Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-03-10ram: aspeed: Rework kconfig optionsJoel Stanley1-40/+51
Ensure the ASPEED related options are grouped together under the RAM option when enabling support. This also makes some minor grammar corrections and renames options so they present cleanly in menuconfig. There should be no functional change to the configuration or binary. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Dylan Hung <dylan_hung@aspeedtech.com>
2022-03-10event: Convert arch_cpu_init_dm() to use eventsSimon Glass1-0/+5
Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10event: Add events for device probe/removeSimon Glass3-0/+27
Generate events when devices are probed or removed, allowing hooks to be added for these situations. This is controlled by the DM_EVENT config option. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-09net: phy: Add support for ethernet-phy-id with gpio resetMichal Simek4-0/+83
Ethernet phy like dp83867 is using strapping resistors to setup PHY address. On Xilinx boards strapping is setup on wires which are connected to SOC where internal pull ups/downs influnce phy address. That's why there is a need to setup pins properly (via pinctrl driver for example) and then perform phy reset. I can be workarounded by reset gpio done for mdio bus but this is not working properly when multiply phys sitting on the same bus. That's why it needs to be done via ethernet-phy-id driver where dt binding has gpio reset per phy. DT binding is available here: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-phy.yaml The driver is are reading the vendor and device id from valid phy node using ofnode_read_eth_phy_id() and creating a phy device. Kconfig PHY_ETHERNET_ID symbol is used because not every platform has gpio support. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Link: https://lore.kernel.org/r/70ab7d71c812b2c972d48c129e416c921af0d7f5.1645627539.git.michal.simek@xilinx.com
2022-03-09net: phy: Remove static return type for phy_device_create()Michal Simek1-3/+3
Remove static return type for phy_device_create() to avoid file scope for this function. Also add required prototype in phy.h. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Link: https://lore.kernel.org/r/1517f4053403fbd53e899d500e7485d068a4f0b6.1645627539.git.michal.simek@xilinx.com
2022-03-09net: phy: Add new read ethernet phy id functionMichal Simek1-0/+36
Add new function to get ethernet phy id from compatible property of the mdio phy node. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Link: https://lore.kernel.org/r/16019efb3820a50330935fdaae191cec1f101b5c.1645627539.git.michal.simek@xilinx.com
2022-03-09i2c: i2c-cdns: Prevent early termination of writeSai Pavan Boddu1-4/+6
During sequential loading of data, hold the bus to prevent controller from sending stop signal in case no data is available in fifo. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/2407b39d305999cb42438c5423aebc3b514acabb.1646122610.git.michal.simek@xilinx.com
2022-03-09i2c: i2c-cdns: Fix write transaction stateSai Pavan Boddu1-0/+6
Start write transfer after loading data to FIFO. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/f0b3e443daa7758e00dfdcc245cf6b2120b0e907.1646122610.git.michal.simek@xilinx.com
2022-03-09i2c: i2c-cdns: Start read transaction after write to transfer_size regSai Pavan Boddu1-1/+1
Avoid a race condition where read transaction is started keeping expected bytes as 0. Which sometimes would result in sending STOP signal as no data is expected. Observed on QEMU platform. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/487c8026791bfd60719403a2df2c54bb0ae99232.1646122610.git.michal.simek@xilinx.com
2022-03-09dma: xilinx: Add Display Port DMA driverMichal Simek3-0/+51
Display Port (DP) has own dma driver that's why add this skeleton driver only for handling power domain setting and send configuration object to PMUFW to enable it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/fe8bc313bcd430b04e9fa6fb770d5799ef28b350.1645627920.git.michal.simek@xilinx.com
2022-03-09video: Add skeleton driver for ZynqMP Display port driverMichal Simek3-0/+75
The reason for this driver is to use call power management driver to enable it in PMUFW. There is missing functionality now but should be added in near future. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/598cb9515bbabc803f72e287464e3d107cd106a3.1645627920.git.michal.simek@xilinx.com
2022-03-09mmc: zynq_sdhci: Add support for dynamic configurationAshok Reddy Soma1-2/+99
Add support for dynamic configuration which will takes care of configuring the SD secure space configuration registers using firmware APIs, performing SD reset assert and deassert. High level sequence: - Check for the PM dynamic configuration support, if no error proceed with SD dynamic configurations(next steps) otherwise skip the dynamic configuration. - Put the SD Controller in reset. - Configure SD Fixed configurations. - Configure the SD Slot Type. - Configure the BASE_CLOCK. - Configure the 8-bit support. - Bring the SD Controller out of reset. In the above steps, apart from the Fixed configurations, remaining all configurations are dynamic and they will be read from devicetree. And also remove hardcoded secure register writes, as dynamic sd config support is added. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/030a3ec041ff3efebd574b4d2b477ad85f12cbce.1645626962.git.michal.simek@xilinx.com
2022-03-09firmware: zynqmp: Add support for set sd config and is function supportedAshok Reddy Soma1-0/+51
Add firmware API's to set SD configuration and to check if a purticular function is supported. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/f64fa2f73e4775e9ad2f4d91339d6c74b43116a3.1645626962.git.michal.simek@xilinx.com
2022-03-08Merge branch '2022-03-08-assorted-fixes'Tom Rini1-1/+2
- serial uclass fix, mailmap/gitignore updates
2022-03-08drivers: serial: Make sure we really return a serial deviceMark Kettenis1-1/+2
The stdout-path property in the device tree does not necessarily point at a serial device. On machines such as the Apple M1 laptops where the serial port isn't easy to access and users expect to see console output on the integrated display stdout-path may point at the device tree node for the framebuffer for example. If stdout-path does not point at a node for a serial device, the serial_check_stdout() will not find a bound device and will drop down into code that attempts to use lists_bind_fdt() to bind a device anyway. However, that fallback code does not check that the uclass of the device is UCLASS_SERIAL. So if stdout-path points at the framebuffer instead of the serial device it will return a UCLASS_VIDEO device. Since the code that calls this function expects the returned device to be a UCLASS_SERIAL device, U-Boot will crash as soon as it attempts to send output to the console. Add a check here to verify that the uclass of the bound device really is UCLASS_SERIAL. If it isn't, serial_check_stdout() will return an error and serial_find_console_or_panic() will use the serial device with sequence number 0 as the console and all is fine. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-08watchdog: rti_wdt: Add 10% safety margin to clock frequencyJan Kiszka1-3/+11
When running against RC_OSC_32k, the watchdog may suffer from running faster than expected, expiring earlier. The Linux kernel adds a 10% margin to the timeout calculation by slowing down the read clock rate accordingly. Do the same here, also to have comparable preset values for both drivers. Along this, fix the name of the local var holding to frequency - in Hz, not kHz. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Stefan Roese <sr@denx.de>
2022-03-08watchdog: armada_37xx: Probe driver also when watchdog is already runningPali Rohár1-14/+3
If Armada 37xx watchdog is started before U-Boot then CNTR_CTRL_ACTIVE bit is set, U-Boot armada-37xx-wdt.c driver fails to initialize and so U-Boot is unable to use or kick this watchdog. Do not check for CNTR_CTRL_ACTIVE bit and always initialize watchdog. Same behavior is implemented in Linux kernel driver. This change allows to activate watchdog in firmware which loads U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-08drivers: watchdog: wdt-uclass.c: add a property u-boot, noautostartPhilippe Reynes1-1/+6
Since commit 492ee6b8d0e7 ("watchdog: wdt-uclass.c: handle all DM watchdogs in watchdog_reset()"), all the watchdog are started when the config WATCHDOG_AUTOSTART. To avoid a binary choice none/all, a property u-boot,noautostart may be added in the watchdog node of the u-boot device tree to not autostart this watchdog. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-07gpio: Add Aspeed GPIO driverAndrew Jeffery3-0/+307
The Aspeed GPIO driver supports the GPIO controllers found in the AST2400, AST2500 and AST2600 BMC SoCs. The implementation is a cut-down copy of the upstream Linux kernel driver, adapted for u-boot. Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
2022-03-07arm: mmc: Add "ti, am335-sdhci" compatible for TI's omap_hsmmc driverLukasz Majewski1-0/+1
In the Linux kernel (v5.16) for this SoC there are two separate drivers - namely sdhci-omap.c and omap_hsmmc.c which have separate set of compatibles. The U-Boot's drivers/mmc/omap_hsmmc.c driver supports both eMMC and SD devices - hence the compatible for SDHCI can be added. After this change the am335x DTS description can be easier ported from Linux kernel. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-03-07drivers: led: led_bcm6753: initial supportPhilippe Reynes3-0/+278
Add the support of the LED IP for bcm6357. This LED IP supports blinking, fading and pulsating, but for the moment, only blinking is supported. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07watchdog: bcm6345: allow to use this driver on arm bcm6753Philippe Reynes1-1/+2
This IP is also used on some arm SoC, so we allow to use it on arm bcm6753 too. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07nand: brcmnand: add bcm6753 supportPhilippe Reynes3-0/+131
This adds the nand support for chipset bcm6753. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07gpio: bcm6345: allow to use this driver on arm bcm6753Philippe Reynes1-1/+2
This IP is also used on some arm SoC, so we allow to use it on arm bcm6753 too. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07power: zynqmp: Use zynqmp_pmufw_node() from firmwareMichal Simek1-24/+5
Remove private xpm_configobject[] and use zynqmp_pmufw_node() which provides the same functionality. Also add debug messages for easier debugging. Fixes: e0283cbdfd49 ("power: zynqmp: Add power domain driver for ZynqMP") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Link: https://lore.kernel.org/r/bddf11459b9b9e849fac9a50db2f1a5fdfae4119.1646122254.git.michal.simek@xilinx.com
2022-03-07gpio: slg7xl45106: Add support for slg7xl45106 i2c gpo expanderT Karthik Reddy3-0/+124
slg7xl45106 is i2c based 8-bit gpo expander, gpo pins are set and get by writing and reading corresponding gpo bit value into its data register. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/839f475cc75c97ffb3496a4caa93de2faabdbca2.1645629688.git.michal.simek@xilinx.com
2022-03-07mmc: zynq_sdhci: Enable card detect workaround for ZynqMPAshok Reddy Soma1-1/+1
Card detect state stable issue is observed on few ZynqMP boards(SOM), so enable the workaround 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait till sd card detect state is stable")' for ZynqMP platforms also. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/0bf6154c79f24227d786efc5e2c1f506185b2bce.1645625609.git.michal.simek@xilinx.com
2022-03-07mmc: zynq_sdhci: Change granularity of timeout to 1usAshok Reddy Soma1-2/+2
The timeout used in 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait till sd card detect state is stable")' workaround is 1000ms at a granularity of 1msec. Change it to 1usec, to not waste time incase the cd is stable. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/f008d2bcf864702a01564789f14f9cdecb8acd45.1645625609.git.michal.simek@xilinx.com
2022-03-07mmc: zynq_sdhci: Fix timeout issueAshok Reddy Soma1-1/+2
In the workaround added with 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait till sd card detect state is stable")' the timeout variable has post decrement. Whenever timeout happens, this post decrement is making timeout=0xffffffff, so timeout error print and return statement are never reached. Fix it by decrementing it inside the while loop. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/61fc1160ada0dd622cd29e381a74af7bf3d9a200.1645625609.git.michal.simek@xilinx.com
2022-03-07mtd: nand: Update driver to match new DT bindingMichal Simek1-3/+6
New binding changed node name from flash@e1000000 to nand-controller@0,0 which should be reflected in the driver. Both names are supported for backward compatibility. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/61f6edd965e0c0b179184823d5283c6c61a1eb35.1645625433.git.michal.simek@xilinx.com
2022-03-04arm64: a37xx: pinctrl: Fix PWM pins indexesMarek Behún1-3/+3
Commit 5534fb4f4833 ("arm64: a37xx: pinctrl: Correct PWM pins definitions") introduced bogus definitions os PWM pins: all 4 pins have index 11, instead of having indexes 11, 12, 13, 14. Fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04drivers: rtc: fix null pointer access in armada38x_rtc_resetFrancois Berder1-1/+1
Replace null pointer by pointer to device registers when calling armada38x_rtc_write. Signed-off-by: Francois Berder <fberder@outlook.fr> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04pci: pci_mvebu: Cleanup macro namesPali Rohár1-70/+60
Use "MVPCIE_" prefix instead of generic "PCIE_" prefix for pci_mvebu.c specific macros. Define offset macros for Root Port registers and use standard register macros from pci.h when accessing Root Port registers. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04pci: pci_mvebu: Remove unused SELECT and lane_maskPali Rohár1-3/+0
Macro SELECT() is unused and struct mvebu_pcie field lane_mask is unused too. Remove them. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04Convert CONFIG_CHIP_SELECTS_PER_CTRL to KconfigTom Rini1-0/+4
This converts the following to Kconfig: CONFIG_CHIP_SELECTS_PER_CTRL Cc: Alison Wang <alison.wang@nxp.com> Cc: Pramod Kumar <pramod.kumar_1@nxp.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-04Convert CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS to KconfigTom Rini1-0/+7
This converts the following to Kconfig: CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-04powerpc: Remove unused MPC8540/60ADS codeTom Rini1-1/+0
Remove some code, primarily CPM2 related, that is now unused since the removal of MPC8540/60ADS. Fixes 3913191c8a6b ("powerpc: mpc8540ads: mpc8560ads: Drop support for MPC8540/60ADS") Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-03Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini9-0/+403
Update and fixes for sl28, lx2, pblimage generation for some powerpc products
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-26 09:49:45 +0300