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2020-09-24net: tsec: Add the compatible string "gianfar" supportHou Zhiqiang1-2/+14
Add compatible string "gianfar" support and update the device-tree-bindings doc. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24net: tsec: Add fixed-link PHY supportHou Zhiqiang1-1/+4
The info of fixed-link PHY is described in DT node instead of getting from MII, so detect the fixed-link PHY DT node first, if it doesn't exist then probe the MII. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24net: tsec: convert to use DM_MDIO when DM_ETH enabledHou Zhiqiang1-33/+5
For the platforms on which the eTSEC driver uses DM_ETH, convert its MDIO controller code to also use DM_MDIO. Note that for handling the TBI PHY (the MAC PCS for SGMII), we still don't register a udevice for it, since we can drive it locally and there is no point in doing otherwise. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Reworked to fix gazerbeam config] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24net: fsl_mdio: Correct the MII management register block addressHou Zhiqiang1-6/+22
The MII management register block offset is different between gianfar and etsec2 compatible devices, this patch is to fix this issue by adding driver data for different compatible string. Fixes: 2932c5a802a9 ("net: tsec: fsl_mdio: add DM MDIO support") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24net: fsl_mdio: Change to use virtual addressHou Zhiqiang1-1/+1
Use virtual address to access the MII block registers instead of physical address. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24phy: make phy_connect_fixed work with a null mdio busVladimir Oltean1-2/+2
It is utterly pointless to require an MDIO bus pointer for a fixed PHY device. The fixed.c implementation does not require it, only phy_device_create. Fix that. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-22dm: add cells_count parameter in live DT APIs of_parse_phandle_with_argsPatrick Delaunay2-4/+6
In the live tree API ofnode_parse_phandle_with_args, the cell_count argument must be used when cells_name is NULL. But this argument is not provided to the live DT function of_parse_phandle_with_args even it is provided to fdtdec_parse_phandle_with_args. This patch adds support of the cells_count parameter in dev_ and of_node API to allow migration and support of live DT: - of_parse_phandle_with_args Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-22dm: syscon: typo aleradyHeinrich Schuchardt1-3/+7
* Fix typo: %s/alerady/already/. * Add missing 'the'. * Reformat a comment. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-21Merge branch '2020-09-14-generic-phy-error-trace' into nextTom Rini5-19/+54
- Add error tracing messages to the generic PHY infrastructure
2020-09-21Merge branch 'master' into nextTom Rini6-28/+31
Merge in v2020.10-rc5
2020-09-19Merge tag 'efi-2020-10-rc5-2' of ↵Tom Rini1-1/+3
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-10-rc5 (2) The following bugs are fixed: * incorrect online help for setenv and env * description of function efi_mem_carve_out() * replace printf() by log_err() in stm32mp1_rng driver A unit test is provided to check that the boot hart id is provided in the RISC-V device-tree.
2020-09-18rng: stm32mp1: use log() instead of printf()Heinrich Schuchardt1-1/+3
The logging system provides flexible filtering and enhanced output. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-09-18usb: dwc3: Add Qualcomm DWC3 compatible stringRobert Marko1-0/+1
Lot of Qualcomm SoC-s use DWC3 controller for both USB2.0 and USB3.0 ports. Qualcomm has some custom config registers on top of the generic ones, but for host mode these are not needed. So lets add the neccessary compatible string. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-09-18phy: add driver for Qualcomm IPQ40xx USB PHYRobert Marko3-0/+152
Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs. The driver sets up HS and SS phys. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-09-18reset: Add IPQ40xx reset controller driverRobert Marko3-0/+182
On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets. So since this will be needed by further drivers, lets add a driver for the reset controller. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-09-18IPQ40xx: Add SMEM supportRobert Marko1-1/+1
There is already existing driver for SMEM so lets enable it for IPQ40xx as well. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-09-17mmc: fsl_esdhc_imx: check the clock stable status after config the clock rate.Haibo Chen1-1/+6
Currently, after config the clock rate, delay 10ms, this is quite a rough method. Check the clock stable status in the present status register is enough. Tested-by: Ji Luo <ji.luo@nxp.com> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2020-09-17net, qe: add DM support for QE UEC ethernetHeiko Schocher14-1/+2696
add DM/DTS support for the UEC ethernet on QUICC Engine Block. Signed-off-by: Heiko Schocher <hs@denx.de> Patch-cc: Mario Six <mario.six@gdsys.cc> Patch-cc: Qiang Zhao <qiang.zhao@nxp.com> Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Patch-cc: Madalin Bucur <madalin.bucur@oss.nxp.com> Series-changes: 3 - revert: commit "3374264df97b" ("drivers: net: qe: deselect QE when DM_ETH is enabled") as now qe works with DM and DM_ETH support. - fix mailaddress from Holger Series-changes: 2 - add comments from Qiang Zhao: - add device node documentation - I did not drop the dm_qe_uec_phy.c and use drivers/net/fsl_mdio.c because using drivers/net/fsl_mdio.c leads in none existent udevice mdio@3320 instead boards with DM ETH support should use now this driver. - remove RFC tag Commit-notes: - I let the old none DM based implementation in code so boards should work with old implementation. This Code should be removed if all boards are converted to DM/DTS. - add the DM based qe uec driver under drivers/net/qe - Therefore copied the files uccf.c uccf.h uec.h from drivers/qe. So there are a lot of Codingstyle problems currently. I fix them in next version if this RFC patch is OK or it needs some changes. - The dm based driver code is now under drivers/net/qe/dm_qe_uec.c Used a lot of functions from drivers/qe/uec.c - seperated the PHY specific code into seperate file drivers/net/qe/dm_qe_uec_phy.c END
2020-09-17powerpc, qe: add DTS support for parallel I/O portsHeiko Schocher3-0/+263
add DM support for parallel I/O ports on QUICC Engine Block Signed-off-by: Heiko Schocher <hs@denx.de> Patch-cc: Mario Six <mario.six@gdsys.cc> Patch-cc: Qiang Zhao <qiang.zhao@nxp.com> Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Series-changes: 2 - remove RFC - fixed Codingstyle errors, therefore new patch powerpc, mpc83xx: fix codingstyle issues for qe_io.c - moved DM part to drivers/pinctrl Commit-notes: Open questions / discussion: - I let the old none DM based implementation in code so boards should work with old implementation. This should be removed if all boards are converted to DM/DTS. - Unfortunately linux DTS does not use "pinctrl-" properties, instead "pio-handle" properties. Even worser old U-Boot code initializes all pins defined in "const qe_iop_conf_t qe_iop_conf_tab[]" table in board code. As linux does the same I decided to also scan through all subnodes containing "pio-map" property and initialize them too. The proper solution would be to check for "pio-handle" when a device is probed. END
2020-09-17powerpc, qe: fix codingstyle issues for drivers/qeHeiko Schocher7-972/+1040
fix Codingstyle for files in drivers/qe, remaining following check warnings: $ ./scripts/checkpatch.pl -f drivers/qe/uec.h CHECK: Macro argument reuse '_bd' - possible side-effects? +#define BD_ADVANCE(_bd, _status, _base) \ + (((_status) & BD_WRAP) ? (_bd) = \ + ((struct buffer_descriptor *)(_base)) : ++(_bd)) total: 0 errors, 0 warnings, 1 checks, 692 lines checked $ ./scripts/checkpatch.pl -f drivers/qe/uec_phy.h total: 0 errors, 0 warnings, 0 checks, 214 lines checked $ ./scripts/checkpatch.pl -f drivers/qe/uccf.c total: 0 errors, 0 warnings, 0 checks, 507 lines checked $ ./scripts/checkpatch.pl -f drivers/qe/uec.c total: 0 errors, 0 warnings, 0 checks, 1434 lines checked $ ./scripts/checkpatch.pl -f drivers/qe/uec_phy.c total: 0 errors, 0 warnings, 0 checks, 927 lines checked $ ./scripts/checkpatch.pl -f drivers/qe/qe.c CHECK: Lines should not end with a '(' +U_BOOT_CMD( total: 0 errors, 0 warnings, 1 checks, 830 lines checked Signed-off-by: Heiko Schocher <hs@denx.de>
2020-09-15Merge tag 'ti-v2021.01-next' of ↵Tom Rini3-91/+117
https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next - Hyperflash boot for J7200 - Update Main R5FSS lockstep mode - R5F remoteproc support for J7200 - Minor env fixes - Add SPI boot support for am335x-icev2
2020-09-15spi: omap3_spi: Read platform data in ofdata_to_platdata()Faiz Abbas1-11/+26
Add an ofdata_to_platdata() callback to access dts in U-boot and access all platform data in it. This prepares the driver for supporting both device tree as well as static platform data structures in SPL. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-09-15arm: mach-omap2: am33xx: Add device structure for spiFaiz Abbas1-69/+1
Add platform data and a device structure for the spi device present on am335x-icev2. This requires moving all omap3_spi platform data structures and symbols to an omap3_spi.h so that the board file can access them. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-09-15spi: spi-uclass: Block dm_scan_fdt_dev with OF_CONTROL to prevent build failuresFaiz Abbas1-1/+1
There are devices which don't use OF_CONTROL or OF_PLATDATA but instead rely on statically defined platdata. Block dm_scan_fdt_dev() with both configs to avoid build failures under this condition. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-09-15remoteproc: k3-r5: Add support for J7200 R5FsSuman Anna1-10/+89
The K3 J7200 SoC family has a revised R5F sub-system and contains a subset of the R5F clusters present on J721E SoCs. The integration of these clusters is very much similar to J721E SoCs otherwise. The revised IP has the following two new features: 1. TCMs are auto-initialized during module power-up, and the behavior is programmable through a MMR bit controlled by System Firmware. 2. The LockStep-mode allows the Core1 TCMs to be combined with the Core0 TCMs effectively doubling the amount of TCMs available. The LockStep-mode on previous SoCs could only use the Core0 TCMs. This combined TCMs appear contiguous at the respective Core0 TCM addresses. Add the support to these clusters in the K3 R5F remoteproc driver using J7200 specific compatibles and revised logic accounting for the above IP features/differences. Signed-off-by: Suman Anna <s-anna@ti.com>
2020-09-15mmc: xenon_sdhci: Add missing common host capabilitiesAndre Heider1-14/+4
Use mmc_of_parse() to set the common host properties. That includes "bus-width", so parsing it can be removed from the driver. But more importantly, "non-removable" is now respected, which fixes the usage of eMMC. Signed-off-by: Andre Heider <a.heider@gmail.com> Reviewed-by: Konstantin Porotchkin <kostap@marvell.com> Tested-by: Marek Behún <marek.behun@nic.cz>
2020-09-15mmc: msm_sdhci: Use mmc_of_parse for setting host_capsManivannan Sadhasivam1-0/+4
Since the introduction of 'get_cd' callback in sdhci core, dragonboard410c's MMC interface is broken. It turns out that 'get_cd' callback checks for the host_caps for validating the chip select. And since the msm_sdhci driver is not parsing the host_caps from DT, not all of the cababilities are parsed properly. This results in the MMC interfaces to be broken. Hence, fix this by adding a call to 'mmc_of_parse' during driver probe. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Tested-by: Aníbal Limón <anibal.limon@linaro.org> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-09-12mtd: nand: Fix nand write error with bad block addresses above 32-bitT Karthik Reddy1-3/+3
Nand writes should skip the bad blocks with "nand write" command. In case of bad blocks with above 32-bit address, nand_block_isbad() returns false due to truncated bad block address. In below code segment, if (nand_block_isbad(mtd, offset & ~(mtd->erasesize - 1))) offset is 64-bit and mtd->erasesize is 32-bit, hence the truncation is happening. Cast 'mtd->erasesize' with loff_t to fix this issue. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-10PCI: mediatek: Release the resource when PCIe enable port failChuanjia Liu1-6/+13
On the mt7623 platform, if one port enable fail and other port enable succeed. It will hang on when using pci enum because the resource was not released correctly. Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-09-10PCI: mediatek: Release the resource when PCIe enable port failChuanjia Liu1-6/+13
On the mt7623 platform, if one port enable fail and other port enable succeed. It will hang on when using pci enum because the resource was not released correctly. Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-09-09clock:aspeed: Sync with Linux kernel clock header defineRyan Chen1-20/+18
v2: modify title description aspeed:clock -> clock:aspeed Use kernel include/dt-bindings/clock/aspeed-clock.h define for clock driver. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2020-09-09cosmetic: aspeed: ast2500: Rename clock headerRyan Chen1-1/+1
Rename the ast2500-scu.h to aspeed-clock.h. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
2020-09-08bcmgenet: Add support for rgmii-rxidJason Wessel1-1/+2
The commit 57805f2270c4 ("net: bcmgenet: Don't set ID_MODE_DIS when not using RGMII") needed to be extended for the case of using the rgmii-rxid. The latest version of the Rasbperry Pi4 dtb files for the 5.4 now specify the rgmii-rxid. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Tested-by: Petr Tesarik <ptesarik@suse.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-09-08bcmgenet: fix DMA buffer managementJason Wessel1-8/+9
This commit fixes a serious issue occurring when several network commands are run on a raspberry pi 4 board: for instance a "dhcp" command and then one or several "tftp" commands. In this case, packet recv callbacks were called several times on the same packets, and send function was failing most of the time. note: if the boot procedure is made of a single network command, the issue is not visible. The issue is related to management of the packet ring buffers (producer / consumer) and DMA. Each time a packet is received, the ethernet device stores it in the buffer and increments an index called RDMA_PROD_INDEX. Each time the driver outputs a received packet, it increments another index called RDMA_CONS_INDEX. Between each pair of network commands, as part of the driver 'start' function, previous code tried to reset both RDMA_CONS_INDEX and RDMA_PROD_INDEX to 0. But RDMA_PROD_INDEX cannot be written from driver side, thus its value was actually not updated, and only RDMA_CONS_INDEX was reset to 0. This was resulting in a major synchronization issue between the driver and the device. Most visible behavior was that the driver seemed to receive again the packets from the previous commands (e.g. DHCP response packets "received" again when performing the first TFTP command). This fix consists in setting RDMA_CONS_INDEX to the same value as RDMA_PROD_INDEX, when resetting the driver. The same kind of fix was needed on the TX side, and a few variables had to be reset accordingly (c_index, tx_index, rx_index). The rx_index and tx_index have only 256 entries so the bottom 8 bits must be masked off. Originated-by: Etienne Dublé <etienne.duble@imag.fr> Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Tested-by: Petr Tesarik <ptesarik@suse.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-09-08usb: musb-new: sunxi: change trace level for phy errors managed by uclassPatrick Delaunay1-4/+4
As the error message is now displayed by generic phy functions, the dev_err/pr_err can be change to dev_dbg/pr_debug. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-08ata: dwc-ahci: change trace level for phy errors managed by uclassPatrick Delaunay1-2/+2
As the error message is now displayed by generic phy functions, the pr_err can be change to pr_debug. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-08usb: host: ehci-hcd: change trace level for phy errors managed by uclassPatrick Delaunay1-4/+4
As the error message is now displayed by generic phy functions, the pr_err can be change to pr_debug. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-08usb: host: ohci: change trace level for phy errors managed by uclassPatrick Delaunay1-4/+4
As the error message is now displayed by generic phy functions, the dev_err can be change to dev_dbg. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-08phy: generic: add error trace to detect PHY issue in uclassPatrick Delaunay1-5/+40
Add an error trace for PHY errors directly in generic phy functions provided by PHY uclass. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-07Merge branch 'remove-config-nr-dram-banks-v9-2020-08-26' of ↵Tom Rini2-8/+3
https://gitlab.denx.de/u-boot/custodians/u-boot-marvell into next
2020-09-04phy: marvell: a3700: add sata comphy on lane 2 with invert optionzachary1-19/+14
- This patch moves sata phy powerup from dedicate phy to compphy and adds invert option for sata powerup routine. Change-Id: I1b4e8753e2b2c14c6efa97bca2ffc7d2553d8a90 Signed-off-by: zachary <zhangzg@marvell.com> Signed-off-by: Ken Ma <make@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/53601 Reviewed-by: Igal Liberman <igall@marvell.com> Tested-by: Igal Liberman <igall@marvell.com> [a.heider: adapt to mainline] Signed-off-by: Andre Heider <a.heider@gmail.com> Tested-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-03Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini21-88/+1753
- Mostly DFU fixes and r8152 fixes
2020-09-03Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini1-1/+4
- SH serial bugfix
2020-09-01fastboot: getvar: fix partition-size return valueGary Bisson1-2/+2
The size returned by 'getvar partition-size' should be in bytes, not in blocks as fastboot uses that value to generate empty partition when running format [1]. Note that the function was already returning the proper size in bytes for NAND devices (see struct part_info details). [1] https://android.googlesource.com/platform/system/core/+/refs/heads/android10-release/fastboot/fastboot.cpp#1500 Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
2020-09-01fastboot: Fix fastboot reboot fail by changing functions orderyurii.pidhornyi1-2/+2
It was revealed that when the fastboot_tx_write_str function is called without the previously initialized fastboot_func->in_req->complete field, a copy of in_req will be sent to the I/O requests queue without an initialized field. Moving a piece of code with the initializing of the fastboot_func->in_req->complete field above transmit_tx allows to solve this problem. Fixes: 65c96757fe9 "usb: fastboot: Convert USB f_fastboot to shared fastboot" Signed-off-by: yurii.pidhornyi <yurii.pidhornyi@globallogic.com>
2020-09-01f_sdp: Change bInterval of interrupt endpoint to 3Sherry Sun1-2/+2
Since the USB HID limits the maximum bandwidth(3072) for interrupt endpoint transfers, when the bInterval set to 1, we can only support 3 boards to run sdp at the same time. In order to support more boards, change the bInterval of interrupt endpoint to 3, which will not affect the transmission speed. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01f_sdp: Add EP1_OUT as default data receive pipe in sdpSherry Sun1-16/+107
EP0 has been used to transfer file data in sdp before, but the max packetsize of ep0 is 64 bytes. So in order to improve the file transfer speed, here add the EP1_OUT interrupt endpoint which max packetsize is set to 1024 byte. After testing, it turns out that using ep1out is twice as fast as using ep0 while receiving data in sdp. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01f_sdp: Support searching and loading FIT or container imagePeng Fan1-12/+58
Add support to f_sdp to search and load iMX8 container image or iMX8M FIT image by new UUU command SDPV. When using the SDPV, the uuu will continue to send out data after first level boot loader used by ROM. This means uuu won't skip to the offset of the second boot loader, and the padding data before second boot loader will be sent out. So we have to search the FIT header or container header in the buffer that SDP received. Also change to more common method to exit f_sdp handler not depending on SPL_FIT_FOUND flag because container loader won't set this. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01f_sdp: Fix wrong usb request sizeYe Li1-1/+1
Because the buffer length of sdp usb request is 65, we have to allocate 65 bytes not 64 bytes. Otherwise there is potential buffer overflow. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-09-01f_sdp: Add high speed endpoint descriptorYe Li1-2/+28
Add HS endpoint descriptor for SDP. So that we can use high speed endpoint, and the SDP device can send packet with 512 byte size. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
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